[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v7 26/64] target/nios2: Use hw/registerfields.h for CR_TLBADDR fi
From: |
Richard Henderson |
Subject: |
[PATCH v7 26/64] target/nios2: Use hw/registerfields.h for CR_TLBADDR fields |
Date: |
Thu, 21 Apr 2022 08:16:57 -0700 |
Use FIELD_EX32 and FIELD_DP32 instead of manual manipulation
of the fields.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/nios2/cpu.h | 8 ++++----
target/nios2/helper.c | 4 ++--
target/nios2/mmu.c | 17 +++++++++--------
target/nios2/translate.c | 2 +-
4 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 114b494294..67ca62fc1f 100644
--- a/target/nios2/cpu.h
+++ b/target/nios2/cpu.h
@@ -110,10 +110,10 @@ FIELD(CR_EXCEPTION, CAUSE, 2, 5)
FIELD(CR_EXCEPTION, ECCFTL, 31, 1)
#define CR_PTEADDR 8
-#define CR_PTEADDR_PTBASE_SHIFT 22
-#define CR_PTEADDR_PTBASE_MASK (0x3FF << CR_PTEADDR_PTBASE_SHIFT)
-#define CR_PTEADDR_VPN_SHIFT 2
-#define CR_PTEADDR_VPN_MASK (0xFFFFF << CR_PTEADDR_VPN_SHIFT)
+
+FIELD(CR_PTEADDR, VPN, 2, 20)
+FIELD(CR_PTEADDR, PTBASE, 22, 10)
+
#define CR_TLBACC 9
#define CR_TLBACC_IGN_SHIFT 25
#define CR_TLBACC_IGN_MASK (0x7F << CR_TLBACC_IGN_SHIFT)
diff --git a/target/nios2/helper.c b/target/nios2/helper.c
index b30740824c..c2d0afe1b6 100644
--- a/target/nios2/helper.c
+++ b/target/nios2/helper.c
@@ -286,8 +286,8 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
} else {
env->ctrl[CR_TLBMISC] |= CR_TLBMISC_D;
}
- env->ctrl[CR_PTEADDR] &= CR_PTEADDR_PTBASE_MASK;
- env->ctrl[CR_PTEADDR] |= (address >> 10) & CR_PTEADDR_VPN_MASK;
+ env->ctrl[CR_PTEADDR] = FIELD_DP32(env->ctrl[CR_PTEADDR], CR_PTEADDR, VPN,
+ address >> TARGET_PAGE_BITS);
env->mmu.pteaddr_wr = env->ctrl[CR_PTEADDR];
cs->exception_index = excp;
diff --git a/target/nios2/mmu.c b/target/nios2/mmu.c
index 95900724e8..75afc56daf 100644
--- a/target/nios2/mmu.c
+++ b/target/nios2/mmu.c
@@ -97,7 +97,7 @@ void helper_mmu_write_tlbacc(CPUNios2State *env, uint32_t v)
/* if tlbmisc.WE == 1 then trigger a TLB write on writes to TLBACC */
if (env->ctrl[CR_TLBMISC] & CR_TLBMISC_WR) {
int way = (env->ctrl[CR_TLBMISC] >> CR_TLBMISC_WAY_SHIFT);
- int vpn = (env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK) >> 2;
+ int vpn = FIELD_EX32(env->mmu.pteaddr_wr, CR_PTEADDR, VPN);
int pid = (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4;
int g = (v & CR_TLBACC_G) ? 1 : 0;
int valid = ((vpn & CR_TLBACC_PFN_MASK) < 0xC0000) ? 1 : 0;
@@ -148,7 +148,7 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env, uint32_t
v)
/* if tlbmisc.RD == 1 then trigger a TLB read on writes to TLBMISC */
if (v & CR_TLBMISC_RD) {
int way = (v >> CR_TLBMISC_WAY_SHIFT);
- int vpn = (env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK) >> 2;
+ int vpn = FIELD_EX32(env->mmu.pteaddr_wr, CR_PTEADDR, VPN);
Nios2TLBEntry *entry =
&env->mmu.tlb[(way * cpu->tlb_num_ways) +
(vpn & env->mmu.tlb_entry_mask)];
@@ -160,8 +160,9 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env, uint32_t
v)
(v & ~CR_TLBMISC_PID_MASK) |
((entry->tag & ((1 << cpu->pid_num_bits) - 1)) <<
CR_TLBMISC_PID_SHIFT);
- env->ctrl[CR_PTEADDR] &= ~CR_PTEADDR_VPN_MASK;
- env->ctrl[CR_PTEADDR] |= (entry->tag >> 12) << CR_PTEADDR_VPN_SHIFT;
+ env->ctrl[CR_PTEADDR] = FIELD_DP32(env->ctrl[CR_PTEADDR],
+ CR_PTEADDR, VPN,
+ entry->tag >> TARGET_PAGE_BITS);
} else {
env->ctrl[CR_TLBMISC] = v;
}
@@ -171,12 +172,12 @@ void helper_mmu_write_tlbmisc(CPUNios2State *env,
uint32_t v)
void helper_mmu_write_pteaddr(CPUNios2State *env, uint32_t v)
{
- trace_nios2_mmu_write_pteaddr(v >> CR_PTEADDR_PTBASE_SHIFT,
- (v & CR_PTEADDR_VPN_MASK) >>
CR_PTEADDR_VPN_SHIFT);
+ trace_nios2_mmu_write_pteaddr(FIELD_EX32(v, CR_PTEADDR, PTBASE),
+ FIELD_EX32(v, CR_PTEADDR, VPN));
/* Writes to PTEADDR don't change the read-back VPN value */
- env->ctrl[CR_PTEADDR] = ((v & ~CR_PTEADDR_VPN_MASK) |
- (env->ctrl[CR_PTEADDR] & CR_PTEADDR_VPN_MASK));
+ env->ctrl[CR_PTEADDR] = ((v & ~R_CR_PTEADDR_VPN_MASK) |
+ (env->ctrl[CR_PTEADDR] & R_CR_PTEADDR_VPN_MASK));
env->mmu.pteaddr_wr = v;
}
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index fc49a7101f..baa22c5101 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -924,7 +924,7 @@ void nios2_cpu_dump_state(CPUState *cs, FILE *f, int flags)
}
}
qemu_fprintf(f, " mmu write: VPN=%05X PID %02X TLBACC %08X\n",
- env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK,
+ env->mmu.pteaddr_wr & R_CR_PTEADDR_VPN_MASK,
(env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4,
env->mmu.tlbacc_wr);
#endif
--
2.34.1
- [PATCH v7 16/64] target/nios2: Split PC out of env->regs[], (continued)
- [PATCH v7 16/64] target/nios2: Split PC out of env->regs[], Richard Henderson, 2022/04/21
- [PATCH v7 17/64] target/nios2: Split out helper for eret instruction, Richard Henderson, 2022/04/21
- [PATCH v7 18/64] target/nios2: Fix BRET instruction, Richard Henderson, 2022/04/21
- [PATCH v7 19/64] target/nios2: Do not create TCGv for control registers, Richard Henderson, 2022/04/21
- [PATCH v7 20/64] linux-user/nios2: Only initialize SP and PC in target_cpu_copy_regs, Richard Henderson, 2022/04/21
- [PATCH v7 23/64] target/nios2: Clean up nios2_cpu_dump_state, Richard Henderson, 2022/04/21
- [PATCH v7 22/64] target/nios2: Split control registers away from general registers, Richard Henderson, 2022/04/21
- [PATCH v7 24/64] target/nios2: Use hw/registerfields.h for CR_STATUS fields, Richard Henderson, 2022/04/21
- [PATCH v7 25/64] target/nios2: Use hw/registerfields.h for CR_EXCEPTION fields, Richard Henderson, 2022/04/21
- [PATCH v7 21/64] target/nios2: Remove cpu_interrupts_enabled, Richard Henderson, 2022/04/21
- [PATCH v7 26/64] target/nios2: Use hw/registerfields.h for CR_TLBADDR fields,
Richard Henderson <=
- [PATCH v7 27/64] target/nios2: Use hw/registerfields.h for CR_TLBACC fields, Richard Henderson, 2022/04/21
- [PATCH v7 28/64] target/nios2: Rename CR_TLBMISC_WR to CR_TLBMISC_WE, Richard Henderson, 2022/04/21
- [PATCH v7 29/64] target/nios2: Use hw/registerfields.h for CR_TLBMISC fields, Richard Henderson, 2022/04/21
- [PATCH v7 30/64] target/nios2: Move R_FOO and CR_BAR into enumerations, Richard Henderson, 2022/04/21
- [PATCH v7 31/64] target/nios2: Create EXCP_SEMIHOST for semi-hosting, Richard Henderson, 2022/04/21
- [PATCH v7 32/64] target/nios2: Clean up nios2_cpu_do_interrupt, Richard Henderson, 2022/04/21
- [PATCH v7 33/64] target/nios2: Hoist CPU_LOG_INT logging, Richard Henderson, 2022/04/21
- [PATCH v7 35/64] target/nios2: Cleanup set of CR_EXCEPTION for do_interrupt, Richard Henderson, 2022/04/21
- [PATCH v7 34/64] target/nios2: Handle EXCP_UNALIGN and EXCP_UALIGND, Richard Henderson, 2022/04/21