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[PULL 00/34] target-arm queue
From: |
Peter Maydell |
Subject: |
[PULL 00/34] target-arm queue |
Date: |
Thu, 5 Jan 2023 16:43:43 +0000 |
Some arm patches; my to-review queue is by no means empty, but
this is a big enough set of patches to be getting on with...
-- PMM
The following changes since commit cb9c6a8e5ad6a1f0ce164d352e3102df46986e22:
.gitlab-ci.d/windows: Work-around timeout and OpenGL problems of the MSYS2
jobs (2023-01-04 18:58:33 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20230105
for you to fetch changes up to 93c9678de9dc7d2e68f9e8477da072bac30ef132:
hw/net: Fix read of uninitialized memory in imx_fec. (2023-01-05 15:33:00
+0000)
----------------------------------------------------------------
target-arm queue:
* Implement AArch32 ARMv8-R support
* Add Cortex-R52 CPU
* fix handling of HLT semihosting in system mode
* hw/timer/ixm_epit: cleanup and fix bug in compare handling
* target/arm: Coding style fixes
* target/arm: Clean up includes
* nseries: minor code cleanups
* target/arm: align exposed ID registers with Linux
* hw/arm/smmu-common: remove unnecessary inlines
* i.MX7D: Handle GPT timers
* i.MX7D: Connect IRQs to GPIO devices
* i.MX6UL: Add a specific GPT timer instance
* hw/net: Fix read of uninitialized memory in imx_fec
----------------------------------------------------------------
Alex Bennée (1):
target/arm: fix handling of HLT semihosting in system mode
Axel Heider (8):
hw/timer/imx_epit: improve comments
hw/timer/imx_epit: cleanup CR defines
hw/timer/imx_epit: define SR_OCIF
hw/timer/imx_epit: update interrupt state on CR write access
hw/timer/imx_epit: hard reset initializes CR with 0
hw/timer/imx_epit: factor out register write handlers
hw/timer/imx_epit: remove explicit fields cnt and freq
hw/timer/imx_epit: fix compare timer handling
Claudio Fontana (1):
target/arm: cleanup cpu includes
Fabiano Rosas (5):
target/arm: Fix checkpatch comment style warnings in helper.c
target/arm: Fix checkpatch space errors in helper.c
target/arm: Fix checkpatch brace errors in helper.c
target/arm: Remove unused includes from m_helper.c
target/arm: Remove unused includes from helper.c
Jean-Christophe Dubois (4):
i.MX7D: Connect GPT timers to IRQ
i.MX7D: Compute clock frequency for the fixed frequency clocks.
i.MX6UL: Add a specific GPT timer instance for the i.MX6UL
i.MX7D: Connect IRQs to GPIO devices.
Peter Maydell (1):
target/arm:Set lg_page_size to 0 if either S1 or S2 asks for it
Philippe Mathieu-Daudé (5):
hw/input/tsc2xxx: Constify set_transform()'s MouseTransformInfo arg
hw/arm/nseries: Constify various read-only arrays
hw/arm/nseries: Silent -Wmissing-field-initializers warning
hw/arm/smmu-common: Reduce smmu_inv_notifiers_mr() scope
hw/arm/smmu-common: Avoid using inlined functions with external linkage
Stephen Longfield (1):
hw/net: Fix read of uninitialized memory in imx_fec.
Tobias Röhmel (7):
target/arm: Don't add all MIDR aliases for cores that implement PMSA
target/arm: Make RVBAR available for all ARMv8 CPUs
target/arm: Make stage_2_format for cache attributes optional
target/arm: Enable TTBCR_EAE for ARMv8-R AArch32
target/arm: Add PMSAv8r registers
target/arm: Add PMSAv8r functionality
target/arm: Add ARM Cortex-R52 CPU
Zhuojia Shen (1):
target/arm: align exposed ID registers with Linux
include/hw/arm/fsl-imx7.h | 20 +
include/hw/arm/smmu-common.h | 3 -
include/hw/input/tsc2xxx.h | 4 +-
include/hw/timer/imx_epit.h | 8 +-
include/hw/timer/imx_gpt.h | 1 +
target/arm/cpu.h | 6 +
target/arm/internals.h | 4 +
hw/arm/fsl-imx6ul.c | 2 +-
hw/arm/fsl-imx7.c | 41 +-
hw/arm/nseries.c | 28 +-
hw/arm/smmu-common.c | 15 +-
hw/input/tsc2005.c | 2 +-
hw/input/tsc210x.c | 3 +-
hw/misc/imx6ul_ccm.c | 6 -
hw/misc/imx7_ccm.c | 49 ++-
hw/net/imx_fec.c | 8 +-
hw/timer/imx_epit.c | 376 +++++++++-------
hw/timer/imx_gpt.c | 25 ++
target/arm/cpu.c | 35 +-
target/arm/cpu64.c | 6 -
target/arm/cpu_tcg.c | 42 ++
target/arm/debug_helper.c | 3 +
target/arm/helper.c | 871 +++++++++++++++++++++++++++++---------
target/arm/m_helper.c | 16 -
target/arm/machine.c | 28 ++
target/arm/ptw.c | 152 +++++--
target/arm/tlb_helper.c | 4 +
target/arm/translate.c | 2 +-
tests/tcg/aarch64/sysregs.c | 24 +-
tests/tcg/aarch64/Makefile.target | 7 +-
30 files changed, 1330 insertions(+), 461 deletions(-)
- [PULL 00/34] target-arm queue,
Peter Maydell <=
- [PULL 02/34] target/arm: Don't add all MIDR aliases for cores that implement PMSA, Peter Maydell, 2023/01/05
- [PULL 01/34] target/arm:Set lg_page_size to 0 if either S1 or S2 asks for it, Peter Maydell, 2023/01/05
- [PULL 03/34] target/arm: Make RVBAR available for all ARMv8 CPUs, Peter Maydell, 2023/01/05
- [PULL 04/34] target/arm: Make stage_2_format for cache attributes optional, Peter Maydell, 2023/01/05
- [PULL 05/34] target/arm: Enable TTBCR_EAE for ARMv8-R AArch32, Peter Maydell, 2023/01/05
- [PULL 08/34] target/arm: Add ARM Cortex-R52 CPU, Peter Maydell, 2023/01/05
- [PULL 07/34] target/arm: Add PMSAv8r functionality, Peter Maydell, 2023/01/05
- [PULL 12/34] hw/timer/imx_epit: define SR_OCIF, Peter Maydell, 2023/01/05
- [PULL 10/34] hw/timer/imx_epit: improve comments, Peter Maydell, 2023/01/05
- [PULL 13/34] hw/timer/imx_epit: update interrupt state on CR write access, Peter Maydell, 2023/01/05