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[PULL 09/34] target/arm: fix handling of HLT semihosting in system mode
From: |
Peter Maydell |
Subject: |
[PULL 09/34] target/arm: fix handling of HLT semihosting in system mode |
Date: |
Thu, 5 Jan 2023 16:43:52 +0000 |
From: Alex Bennée <alex.bennee@linaro.org>
The check semihosting_enabled() wants to know if the guest is
currently in user mode. Unlike the other cases the test was inverted
causing us to block semihosting calls in non-EL0 modes.
Cc: qemu-stable@nongnu.org
Fixes: 19b26317e9 (target/arm: Honour -semihosting-config userspace=on)
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 74a903072fe..1dcaefb8e75 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1184,7 +1184,7 @@ static inline void gen_hlt(DisasContext *s, int imm)
* semihosting, to provide some semblance of security
* (and for consistency with our 32-bit semihosting).
*/
- if (semihosting_enabled(s->current_el != 0) &&
+ if (semihosting_enabled(s->current_el == 0) &&
(imm == (s->thumb ? 0x3c : 0xf000))) {
gen_exception_internal_insn(s, EXCP_SEMIHOST);
return;
--
2.25.1
- [PULL 02/34] target/arm: Don't add all MIDR aliases for cores that implement PMSA, (continued)
- [PULL 02/34] target/arm: Don't add all MIDR aliases for cores that implement PMSA, Peter Maydell, 2023/01/05
- [PULL 01/34] target/arm:Set lg_page_size to 0 if either S1 or S2 asks for it, Peter Maydell, 2023/01/05
- [PULL 03/34] target/arm: Make RVBAR available for all ARMv8 CPUs, Peter Maydell, 2023/01/05
- [PULL 04/34] target/arm: Make stage_2_format for cache attributes optional, Peter Maydell, 2023/01/05
- [PULL 05/34] target/arm: Enable TTBCR_EAE for ARMv8-R AArch32, Peter Maydell, 2023/01/05
- [PULL 08/34] target/arm: Add ARM Cortex-R52 CPU, Peter Maydell, 2023/01/05
- [PULL 07/34] target/arm: Add PMSAv8r functionality, Peter Maydell, 2023/01/05
- [PULL 12/34] hw/timer/imx_epit: define SR_OCIF, Peter Maydell, 2023/01/05
- [PULL 10/34] hw/timer/imx_epit: improve comments, Peter Maydell, 2023/01/05
- [PULL 13/34] hw/timer/imx_epit: update interrupt state on CR write access, Peter Maydell, 2023/01/05
- [PULL 09/34] target/arm: fix handling of HLT semihosting in system mode,
Peter Maydell <=
- [PULL 06/34] target/arm: Add PMSAv8r registers, Peter Maydell, 2023/01/05
- [PULL 16/34] hw/timer/imx_epit: remove explicit fields cnt and freq, Peter Maydell, 2023/01/05
- [PULL 17/34] hw/timer/imx_epit: fix compare timer handling, Peter Maydell, 2023/01/05
- [PULL 14/34] hw/timer/imx_epit: hard reset initializes CR with 0, Peter Maydell, 2023/01/05
- [PULL 19/34] target/arm: Fix checkpatch space errors in helper.c, Peter Maydell, 2023/01/05
- [PULL 24/34] hw/input/tsc2xxx: Constify set_transform()'s MouseTransformInfo arg, Peter Maydell, 2023/01/05
- [PULL 25/34] hw/arm/nseries: Constify various read-only arrays, Peter Maydell, 2023/01/05
- [PULL 23/34] target/arm: cleanup cpu includes, Peter Maydell, 2023/01/05
- [PULL 15/34] hw/timer/imx_epit: factor out register write handlers, Peter Maydell, 2023/01/05
- [PULL 21/34] target/arm: Remove unused includes from m_helper.c, Peter Maydell, 2023/01/05