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Re: [PATCH qemu 06/13] target/riscv: rvv: Add tail agnostic for vector i


From: Weiwei Li
Subject: Re: [PATCH qemu 06/13] target/riscv: rvv: Add tail agnostic for vector integer shift instructions
Date: Sun, 20 Mar 2022 10:36:51 +0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0


在 2022/3/7 下午5:38, ~eopxd 写道:
From: eopXD <eop.chen@sifive.com>

Signed-off-by: eop Chen <eop.chen@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
---
  target/riscv/insn_trans/trans_rvv.c.inc |  1 +
  target/riscv/vector_helper.c            | 12 ++++++++++++
  2 files changed, 13 insertions(+)

diff --git a/target/riscv/insn_trans/trans_rvv.c.inc 
b/target/riscv/insn_trans/trans_rvv.c.inc
index ac6379a8fc..f1838fbf11 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -1871,6 +1871,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a)    
         \
                                                                     \
          data = FIELD_DP32(data, VDATA, VM, a->vm);                 \
          data = FIELD_DP32(data, VDATA, LMUL, s->lmul);             \
+        data = FIELD_DP32(data, VDATA, VTA, s->vta);               \
          tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0),     \
                             vreg_ofs(s, a->rs1),                    \
                             vreg_ofs(s, a->rs2), cpu_env,           \
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 56a32adcb9..6d79908ffe 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -1216,6 +1216,9 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1,          
                \
  {                                                                         \
      uint32_t vm = vext_vm(desc);                                          \
      uint32_t vl = env->vl;                                                \
+    uint32_t esz = sizeof(TS1);                                           \
+    uint32_t vlmax = vext_get_vlmax(env_archcpu(env), env->vtype);        \
+    uint32_t vta = vext_vta(desc);                                        \
      uint32_t i;                                                           \
                                                                            \
      for (i = env->vstart; i < vl; i++) {                                  \
@@ -1227,6 +1230,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1,          
                \
          *((TS1 *)vd + HS1(i)) = OP(s2, s1 & MASK);                        \
      }                                                                     \
      env->vstart = 0;                                                      \
+    /* set tail elements to 1s */                                         \
+    vext_set_elems_1s_fns[ctzl(esz)](vd, vta, vl, vl * esz, vlmax * esz); \
  }

Use vlmax here and in the previous patches may not contains all the tail elements:

"When LMUL < 1, the tail includes the elements past VLMAX that are held in the same vector register"

Regards,

Weiwei Li




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