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[avr-gcc-list] Handling High Speed Interrupts
From: |
Ramkumar Rengaswamy |
Subject: |
[avr-gcc-list] Handling High Speed Interrupts |
Date: |
Wed, 22 Sep 2004 00:08:39 -0700 (PDT) |
Hi,
I have an application that needs to generate a Timer Output Compare
Interrput every 10 uS. I have an ATMega128L clocked at 7.329 MHz. This
means that I have 74 clock cycles to handle the interrupt routine and
currently most of the clock cycles are wasted in pushing and popping
things off the stack. Is there anyway in avr-gcc to avoid all this
overhead and utilize all the cycles for my processing only ?
Thanks,
-Ram
- [avr-gcc-list] Handling High Speed Interrupts,
Ramkumar Rengaswamy <=
- RE: [avr-gcc-list] Handling High Speed Interrupts, Bernard Fouche, 2004/09/22
- Re: [avr-gcc-list] Handling High Speed Interrupts, Janos Sztriko, 2004/09/22
- Re: [avr-gcc-list] Handling High Speed Interrupts, Ormund Williams, 2004/09/22
- Re: [avr-gcc-list] Handling High Speed Interrupts, Andy Warner, 2004/09/22
- Re: [avr-gcc-list] Handling High Speed Interrupts, Michal Vanka, 2004/09/23