Re: [PATCH v8 00/45] target/arm: Implement ARMv8.5-MemTag, system mode

[Derrick McKee]

Hi Richard,

I am currently doing research with MTE, and Arm's FVP leaves a lot to
be desired.  Is there some way I can get access to your QEMU changes
that enable MTE for system emulation?  Thanks.

On Tue, Jun 23, 2020 at 3:37 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Version 8 incorporates quite a bit of review (thanks, PMM):
>
>  * Include HCR_DCT in the HCR_EL2 update.
>  * Use a separate decode function for ADDG/SUBG.
>  * Use the system arm_cpu_do_unaligned_access for user-only as well.
>  * Fix alignment for LDG.
>  * Fix no-fault for mte_probe1.
>  * Rearrage how tagged pages are recorded.
>
> and perhaps most visibly, for those tracking the kernel patches:
>
>  * Add arm,armv8.5-memtag to the dtb.
>
>
> r~
>
>
> In need of review:
> 0010-target-arm-Revise-decoding-for-disas_add_sub_imm.patch
> 0011-target-arm-Implement-the-ADDG-SUBG-instructions.patch
> 0014-target-arm-Define-arm_cpu_do_unaligned_access-for.patch
> 0015-target-arm-Implement-LDG-STG-ST2G-instructions.patch
> 0025-target-arm-Implement-helper_mte_check1.patch
> 0028-target-arm-Use-mte_checkN-for-sve-unpredicated-lo.patch
> 0029-target-arm-Use-mte_checkN-for-sve-unpredicated-st.patch
> 0030-target-arm-Use-mte_check1-for-sve-LD1R.patch
> 0031-target-arm-Tidy-trans_LD1R_zpri.patch
> 0032-target-arm-Add-arm_tlb_bti_gp.patch
> 0033-target-arm-Add-mte-helpers-for-sve-scalar-int-loa.patch
> 0034-target-arm-Add-mte-helpers-for-sve-scalar-int-sto.patch
> 0035-target-arm-Add-mte-helpers-for-sve-scalar-int-ff-.patch
> 0036-target-arm-Handle-TBI-for-sve-scalar-int-memory-o.patch
> 0037-target-arm-Add-mte-helpers-for-sve-scatter-gather.patch
> 0038-target-arm-Complete-TBI-clearing-for-user-only-fo.patch
> 0041-target-arm-Always-pass-cacheattr-to-get_phys_addr.patch
> 0042-target-arm-Cache-the-Tagged-bit-for-a-page-in-Mem.patch
> 0043-target-arm-Create-tagged-ram-when-MTE-is-enabled.patch
> 0044-target-arm-Add-allocation-tag-storage-for-system-.patch
> 0045-target-arm-Enable-MTE.patch
>
>
> Richard Henderson (45):
>   target/arm: Add isar tests for mte
>   target/arm: Improve masking of SCR RES0 bits
>   target/arm: Add support for MTE to SCTLR_ELx
>   target/arm: Add support for MTE to HCR_EL2 and SCR_EL3
>   target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT
>   target/arm: Add DISAS_UPDATE_NOCHAIN
>   target/arm: Add MTE system registers
>   target/arm: Add MTE bits to tb_flags
>   target/arm: Implement the IRG instruction
>   target/arm: Revise decoding for disas_add_sub_imm
>   target/arm: Implement the ADDG, SUBG instructions
>   target/arm: Implement the GMI instruction
>   target/arm: Implement the SUBP instruction
>   target/arm: Define arm_cpu_do_unaligned_access for user-only
>   target/arm: Implement LDG, STG, ST2G instructions
>   target/arm: Implement the STGP instruction
>   target/arm: Restrict the values of DCZID.BS under TCG
>   target/arm: Simplify DC_ZVA
>   target/arm: Implement the LDGM, STGM, STZGM instructions
>   target/arm: Implement the access tag cache flushes
>   target/arm: Move regime_el to internals.h
>   target/arm: Move regime_tcr to internals.h
>   target/arm: Add gen_mte_check1
>   target/arm: Add gen_mte_checkN
>   target/arm: Implement helper_mte_check1
>   target/arm: Implement helper_mte_checkN
>   target/arm: Add helper_mte_check_zva
>   target/arm: Use mte_checkN for sve unpredicated loads
>   target/arm: Use mte_checkN for sve unpredicated stores
>   target/arm: Use mte_check1 for sve LD1R
>   target/arm: Tidy trans_LD1R_zpri
>   target/arm: Add arm_tlb_bti_gp
>   target/arm: Add mte helpers for sve scalar + int loads
>   target/arm: Add mte helpers for sve scalar + int stores
>   target/arm: Add mte helpers for sve scalar + int ff/nf loads
>   target/arm: Handle TBI for sve scalar + int memory ops
>   target/arm: Add mte helpers for sve scatter/gather memory ops
>   target/arm: Complete TBI clearing for user-only for SVE
>   target/arm: Implement data cache set allocation tags
>   target/arm: Set PSTATE.TCO on exception entry
>   target/arm: Always pass cacheattr to get_phys_addr
>   target/arm: Cache the Tagged bit for a page in MemTxAttrs
>   target/arm: Create tagged ram when MTE is enabled
>   target/arm: Add allocation tag storage for system mode
>   target/arm: Enable MTE
>
>  include/hw/arm/boot.h          |    3 +
>  target/arm/cpu.h               |   50 +-
>  target/arm/helper-a64.h        |   16 +
>  target/arm/helper-sve.h        |  488 ++++++++++++
>  target/arm/helper.h            |    2 +
>  target/arm/internals.h         |  153 +++-
>  target/arm/translate-a64.h     |    5 +
>  target/arm/translate.h         |   23 +-
>  hw/arm/boot.c                  |   12 +-
>  hw/arm/virt.c                  |   57 +-
>  target/arm/cpu.c               |   77 +-
>  target/arm/cpu64.c             |    1 +
>  target/arm/helper-a64.c        |   94 +--
>  target/arm/helper.c            |  423 +++++++---
>  target/arm/m_helper.c          |   11 +-
>  target/arm/mte_helper.c        |  901 +++++++++++++++++++++
>  target/arm/op_helper.c         |   16 +
>  target/arm/sve_helper.c        |  616 +++++++++++---
>  target/arm/tlb_helper.c        |   13 +-
>  target/arm/translate-a64.c     |  652 +++++++++++++--
>  target/arm/translate-sve.c     | 1366 +++++++++++++++++++++-----------
>  target/arm/translate-vfp.inc.c |    2 +-
>  target/arm/translate.c         |   16 +-
>  target/arm/Makefile.objs       |    1 +
>  24 files changed, 4164 insertions(+), 834 deletions(-)
>  create mode 100644 target/arm/mte_helper.c
>
> --
> 2.25.1
>
>


--
Derrick McKee
Phone: (703) 957-9362
Email: derrick.mckee@gmail.com