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[PATCH v2 13/43] hw/isa/piix3: Create power management controller in hos
From: |
Bernhard Beschow |
Subject: |
[PATCH v2 13/43] hw/isa/piix3: Create power management controller in host device |
Date: |
Sat, 22 Oct 2022 17:04:38 +0200 |
The power management controller is an integral part of PIIX3 (function
3). So create it as part of the south bridge.
Note that the ACPI function is optional in QEMU. This is why it gets
object_initialize_child()'ed in realize rather than in instance_init.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
hw/i386/pc_piix.c | 23 +++++++++++++----------
hw/isa/Kconfig | 1 +
hw/isa/piix3.c | 14 ++++++++++++++
include/hw/southbridge/piix.h | 6 ++++++
4 files changed, 34 insertions(+), 10 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 22c1c5404c..c96d989636 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -46,11 +46,11 @@
#include "sysemu/kvm.h"
#include "hw/kvm/clock.h"
#include "hw/sysbus.h"
+#include "hw/i2c/i2c.h"
#include "hw/i2c/smbus_eeprom.h"
#include "hw/xen/xen-x86.h"
#include "exec/memory.h"
#include "hw/acpi/acpi.h"
-#include "hw/acpi/piix4.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "sysemu/xen.h"
@@ -85,6 +85,7 @@ static void pc_init1(MachineState *machine,
MemoryRegion *system_io = get_system_io();
PCIBus *pci_bus;
ISABus *isa_bus;
+ Object *piix4_pm;
int piix3_devfn = -1;
qemu_irq smi_irq;
GSIState *gsi_state;
@@ -222,6 +223,13 @@ static void pc_init1(MachineState *machine,
pci_dev = pci_new_multifunction(-1, true, type);
object_property_set_bool(OBJECT(pci_dev), "has-usb",
machine_usb(machine), &error_abort);
+ object_property_set_bool(OBJECT(pci_dev), "has-acpi",
+ x86_machine_is_acpi_enabled(x86ms),
+ &error_abort);
+ qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100);
+ object_property_set_bool(OBJECT(pci_dev), "smm-enabled",
+ x86_machine_is_smm_enabled(x86ms),
+ &error_abort);
pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
piix3 = PIIX3_PCI_DEVICE(pci_dev);
piix3->pic = x86ms->gsi;
@@ -229,8 +237,10 @@ static void pc_init1(MachineState *machine,
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
"rtc"));
+ piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
} else {
pci_bus = NULL;
+ piix4_pm = NULL;
isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
&error_abort);
@@ -300,15 +310,8 @@ static void pc_init1(MachineState *machine,
}
#endif
- if (pcmc->pci_enabled && x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) {
- PCIDevice *piix4_pm;
-
+ if (piix4_pm) {
smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
- piix4_pm = pci_new(piix3_devfn + 3, TYPE_PIIX4_PM);
- qdev_prop_set_uint32(DEVICE(piix4_pm), "smb_io_base", 0xb100);
- qdev_prop_set_bit(DEVICE(piix4_pm), "smm-enabled",
- x86_machine_is_smm_enabled(x86ms));
- pci_realize_and_unref(piix4_pm, pci_bus, &error_fatal);
qdev_connect_gpio_out(DEVICE(piix4_pm), 0, x86ms->gsi[9]);
qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq);
@@ -322,7 +325,7 @@ static void pc_init1(MachineState *machine,
object_property_allow_set_link,
OBJ_PROP_LINK_STRONG);
object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
- OBJECT(piix4_pm), &error_abort);
+ piix4_pm, &error_abort);
}
if (machine->nvdimms_state->is_enabled) {
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index f02eca3c3e..f10daa26bc 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -33,6 +33,7 @@ config PC87312
config PIIX3
bool
+ select ACPI_PIIX4
select I8257
select ISA_BUS
select MC146818RTC
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 2f227fde0e..a4b8ebd5f5 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -331,6 +331,17 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
return;
}
}
+
+ /* Power Management */
+ if (d->has_acpi) {
+ object_initialize_child(OBJECT(d), "pm", &d->pm, TYPE_PIIX4_PM);
+ qdev_prop_set_int32(DEVICE(&d->pm), "addr", dev->devfn + 3);
+ qdev_prop_set_uint32(DEVICE(&d->pm), "smb_io_base", d->smb_io_base);
+ qdev_prop_set_bit(DEVICE(&d->pm), "smm-enabled", d->smm_enabled);
+ if (!qdev_realize(DEVICE(&d->pm), BUS(pci_bus), errp)) {
+ return;
+ }
+ }
}
static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
@@ -354,7 +365,10 @@ static void pci_piix3_init(Object *obj)
}
static Property pci_piix3_props[] = {
+ DEFINE_PROP_UINT32("smb_io_base", PIIX3State, smb_io_base, 0),
+ DEFINE_PROP_BOOL("has-acpi", PIIX3State, has_acpi, true),
DEFINE_PROP_BOOL("has-usb", PIIX3State, has_usb, true),
+ DEFINE_PROP_BOOL("smm-enabled", PIIX3State, smm_enabled, false),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index 5367917182..1c291cc954 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -14,6 +14,7 @@
#include "hw/pci/pci.h"
#include "qom/object.h"
+#include "hw/acpi/piix4.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/usb/hcd-uhci.h"
@@ -56,6 +57,9 @@ struct PIIXState {
RTCState rtc;
UHCIState uhci;
+ PIIX4PMState pm;
+
+ uint32_t smb_io_base;
/* Reset Control Register contents */
uint8_t rcr;
@@ -63,7 +67,9 @@ struct PIIXState {
/* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */
MemoryRegion rcr_mem;
+ bool has_acpi;
bool has_usb;
+ bool smm_enabled;
};
typedef struct PIIXState PIIX3State;
--
2.38.1
- [PATCH v2 05/43] hw/isa/piix3: Modernize reset handling, (continued)
- [PATCH v2 05/43] hw/isa/piix3: Modernize reset handling, Bernhard Beschow, 2022/10/22
- [PATCH v2 06/43] hw/isa/piix3: Prefer pci_address_space() over get_system_memory(), Bernhard Beschow, 2022/10/22
- [PATCH v2 07/43] hw/isa/piix4: Rename wrongly named method, Bernhard Beschow, 2022/10/22
- [PATCH v2 08/43] hw/ide/piix: Introduce TYPE_ macros for PIIX IDE controllers, Bernhard Beschow, 2022/10/22
- [PATCH v2 09/43] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models, Bernhard Beschow, 2022/10/22
- [PATCH v2 10/43] hw/i386/pc: Create RTC controllers in south bridges, Bernhard Beschow, 2022/10/22
- [PATCH v2 11/43] hw/i386/pc: No need for rtc_state to be an out-parameter, Bernhard Beschow, 2022/10/22
- [PATCH v2 12/43] hw/isa/piix3: Create USB controller in host device, Bernhard Beschow, 2022/10/22
- [PATCH v2 13/43] hw/isa/piix3: Create power management controller in host device,
Bernhard Beschow <=
- [PATCH v2 14/43] hw/intc/i8259: Introduce i8259 proxy "isa-pic", Bernhard Beschow, 2022/10/22
- [PATCH v2 15/43] hw/isa/piix3: Create ISA PIC in host device, Bernhard Beschow, 2022/10/22
- [PATCH v2 16/43] hw/isa/piix3: Create IDE controller in host device, Bernhard Beschow, 2022/10/22
- [PATCH v2 17/43] hw/isa/piix3: Wire up ACPI interrupt internally, Bernhard Beschow, 2022/10/22
- [PATCH v2 18/43] hw/isa/piix3: Remove unused include, Bernhard Beschow, 2022/10/22
- [PATCH v2 19/43] hw/isa/piix3: Allow board to provide PCI interrupt routes, Bernhard Beschow, 2022/10/22