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Re: [Qemu-devel] [PATCH 18/26] Implement the PAPR (pSeries) virtualized

From: Anthony Liguori
Subject: Re: [Qemu-devel] [PATCH 18/26] Implement the PAPR (pSeries) virtualized interrupt controller (xics)
Date: Thu, 17 Mar 2011 08:13:27 -0500
User-agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv: Gecko/20110223 Lightning/1.0b2 Thunderbird/3.1.8

On 03/16/2011 08:34 PM, David Gibson wrote:

+ * ICP: Presentation layer
+ */
+struct icp_server_state {
+    uint32_t cppr :8;
+    uint32_t xisr :24;
No real reason to use bitfields here.
Well.. in the hardware xics implementation, CPPR and XISR are
considered fields of the one 32-bit register, XIRR.  Matching that is
why I have the bitfield.

Bitfields don't work well with the way we save device state.


Anthony Liguori

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