Re: [Qemu-devel] [PATCH 18/26] Implement the PAPR (pSeries) virtualized interrupt controller (xics)

[Anthony Liguori]

On 03/16/2011 08:34 PM, David Gibson wrote:
> > > +/*
> > > + * ICP: Presentation layer
> > > + */
> > > +
> > > +struct icp_server_state {
> > > +    uint32_t cppr :8;
> > > +    uint32_t xisr :24;
> > No real reason to use bitfields here.
> Well.. in the hardware xics implementation, CPPR and XISR are
> considered fields of the one 32-bit register, XIRR.  Matching that is
> why I have the bitfield.

Bitfields don't work well with the way we save device state.

Regards,

Anthony Liguori