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Re: [Qemu-devel] [PATCH 18/26] Implement the PAPR (pSeries) virtualized
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [PATCH 18/26] Implement the PAPR (pSeries) virtualized interrupt controller (xics) |
Date: |
Thu, 17 Mar 2011 12:34:59 +1100 |
User-agent: |
Mutt/1.5.20 (2009-06-14) |
On Wed, Mar 16, 2011 at 05:16:07PM -0500, Anthony Liguori wrote:
> On 03/15/2011 11:56 PM, David Gibson wrote:
[snip]
> >+#include<pthread.h>
>
> This isn't needed and it'll break the Windows build. We carry a
> global mutex whenever QEMU code executes.
Good point, I wrote this before I realized all the qemu code was serialized.
> >+/*
> >+ * ICP: Presentation layer
> >+ */
> >+
> >+struct icp_server_state {
> >+ uint32_t cppr :8;
> >+ uint32_t xisr :24;
>
> No real reason to use bitfields here.
Well.. in the hardware xics implementation, CPPR and XISR are
considered fields of the one 32-bit register, XIRR. Matching that is
why I have the bitfield.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
Re: [Qemu-devel] [PATCH 21/26] Implement TCE translation for sPAPR VIO, Anthony Liguori, 2011/03/16
[Qemu-devel] [PATCH 18/26] Implement the PAPR (pSeries) virtualized interrupt controller (xics), David Gibson, 2011/03/16
Re: [Qemu-devel] [PATCH 18/26] Implement the PAPR (pSeries) virtualized interrupt controller (xics), Anthony Liguori, 2011/03/16
[Qemu-devel] [PATCH 26/26] Implement PAPR VPA functions for pSeries shared processor partitions, David Gibson, 2011/03/16
[Qemu-devel] [PATCH 23/26] Implement PAPR CRQ hypercalls, David Gibson, 2011/03/16
[Qemu-devel] [PATCH 25/26] Add a PAPR TCE-bypass mechanism for the pSeries machine, David Gibson, 2011/03/16