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[Qemu-devel] [RFC PATCH 29/30] tests/test-softfloat: add f16_to_int16 co
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [RFC PATCH 29/30] tests/test-softfloat: add f16_to_int16 conversion test |
Date: |
Fri, 13 Oct 2017 17:24:37 +0100 |
Signed-off-by: Alex Bennée <address@hidden>
---
tests/test-softfloat.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/tests/test-softfloat.c b/tests/test-softfloat.c
index d7b740e1cb..e1f356572d 100644
--- a/tests/test-softfloat.c
+++ b/tests/test-softfloat.c
@@ -16,6 +16,31 @@ typedef struct {
uint8_t final_exception_flags;
} f16_test_data;
+static void test_f16_convert_to_int(void)
+{
+ int i;
+ float16 out;
+ float_status flags, *fp = &flags;
+ f16_test_data test_data[] = {
+ /* from risu fcvtps v23.4h, v16.4h */
+ { { .float_rounding_mode = float_round_up}, 0xa619, 0xb860, 0 },
+ { { .float_rounding_mode = float_round_up}, 0x83c0, 0xff91, 0 },
+ { { .float_rounding_mode = float_round_up}, 0x6966, 0x0001, 0 },
+ { { .float_rounding_mode = float_round_up}, 0x06b1, 0x0001, 0 },
+ };
+
+ for (i = 0; i < ARRAY_SIZE(test_data); ++i) {
+ flags = test_data[i].initial_status;
+ out = float16_to_int16(test_data[i].in, fp);
+
+ if (!(test_data[i].out == out)) {
+ fprintf(stderr, "%s[%d]: expected %#04x got %#04x\n",
+ __func__, i, test_data[i].out, out);
+ g_test_fail();
+ }
+ }
+}
+
static void test_f16_round_to_int(void)
{
int i;
@@ -54,5 +79,6 @@ int main(int argc, char *argv[])
{
g_test_init(&argc, &argv, NULL);
g_test_add_func("/softfloat/f16/round_to_int", test_f16_round_to_int);
+ g_test_add_func("/softfloat/f16/convert_to_int", test_f16_convert_to_int);
return g_test_run();
}
--
2.14.1
- Re: [Qemu-devel] [RFC PATCH 09/30] softfloat: propagate signalling NaNs in MINMAX, (continued)
- [Qemu-devel] [RFC PATCH 15/30] softfloat: half-precision add/sub/mul/div support, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 11/30] target/arm: implement half-precision F(MIN|MAX)(V|NMV), Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 17/30] target/arm/translate-a64.c: add FP16 FMULX, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 26/30] tests/test-softfloat: add a simple test framework, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 22/30] target/arm/translate-a64.c: add FP16 FAGCT to AdvSIMD 3 Same, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 29/30] tests/test-softfloat: add f16_to_int16 conversion test,
Alex Bennée <=
- [Qemu-devel] [RFC PATCH 13/30] target/arm/translate-a64.c: AdvSIMD scalar 3 Same FP16 initial decode, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 23/30] softfloat: add float16_rem and float16_muladd (!CHECK), Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 18/30] target/arm/translate-a64.c: add AdvSIMD scalar two-reg misc skeleton, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 20/30] softfloat: half-precision compare functions, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 25/30] softfloat: float16_round_to_int, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 27/30] target/arm/translate-a64.c: add FP16 FRINTP to 2 reg misc, Alex Bennée, 2017/10/13
- [Qemu-devel] [RFC PATCH 30/30] target/arm/translate-a64.c: add FP16 FCVTPS to 2 reg misc, Alex Bennée, 2017/10/13