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[Qemu-devel] [PULL 11/49] target/arm: Rearrange decode in disas_data_pro
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 11/49] target/arm: Rearrange decode in disas_data_proc_1src |
Date: |
Fri, 18 Jan 2019 14:57:27 +0000 |
From: Richard Henderson <address@hidden>
Now properly signals unallocated for REV64 with SF=0.
Allows for the opcode2 field to be decoded shortly.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate-a64.c | 31 ++++++++++++++++++++++---------
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index b72aea3e974..dac61a3c3a5 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4563,38 +4563,51 @@ static void handle_rev16(DisasContext *s, unsigned int
sf,
*/
static void disas_data_proc_1src(DisasContext *s, uint32_t insn)
{
- unsigned int sf, opcode, rn, rd;
+ unsigned int sf, opcode, opcode2, rn, rd;
- if (extract32(insn, 29, 1) || extract32(insn, 16, 5)) {
+ if (extract32(insn, 29, 1)) {
unallocated_encoding(s);
return;
}
sf = extract32(insn, 31, 1);
opcode = extract32(insn, 10, 6);
+ opcode2 = extract32(insn, 16, 5);
rn = extract32(insn, 5, 5);
rd = extract32(insn, 0, 5);
- switch (opcode) {
- case 0: /* RBIT */
+#define MAP(SF, O2, O1) ((SF) | (O1 << 1) | (O2 << 7))
+
+ switch (MAP(sf, opcode2, opcode)) {
+ case MAP(0, 0x00, 0x00): /* RBIT */
+ case MAP(1, 0x00, 0x00):
handle_rbit(s, sf, rn, rd);
break;
- case 1: /* REV16 */
+ case MAP(0, 0x00, 0x01): /* REV16 */
+ case MAP(1, 0x00, 0x01):
handle_rev16(s, sf, rn, rd);
break;
- case 2: /* REV32 */
+ case MAP(0, 0x00, 0x02): /* REV/REV32 */
+ case MAP(1, 0x00, 0x02):
handle_rev32(s, sf, rn, rd);
break;
- case 3: /* REV64 */
+ case MAP(1, 0x00, 0x03): /* REV64 */
handle_rev64(s, sf, rn, rd);
break;
- case 4: /* CLZ */
+ case MAP(0, 0x00, 0x04): /* CLZ */
+ case MAP(1, 0x00, 0x04):
handle_clz(s, sf, rn, rd);
break;
- case 5: /* CLS */
+ case MAP(0, 0x00, 0x05): /* CLS */
+ case MAP(1, 0x00, 0x05):
handle_cls(s, sf, rn, rd);
break;
+ default:
+ unallocated_encoding(s);
+ break;
}
+
+#undef MAP
}
static void handle_div(DisasContext *s, bool is_signed, unsigned int sf,
--
2.20.1
- [Qemu-devel] [PULL 02/49] hw/arm/virt-acpi-build: Set COHACC override flag in IORT SMMUv3 node, (continued)
- [Qemu-devel] [PULL 02/49] hw/arm/virt-acpi-build: Set COHACC override flag in IORT SMMUv3 node, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 04/49] ftgmac100: implement the new MDIO interface on Aspeed SoC, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 03/49] target/arm: Allow Aarch32 exception return to switch from Mon->Hyp, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 05/49] target/arm: Add state for the ARMv8.3-PAuth extension, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 06/49] target/arm: Add SCTLR bits through ARMv8.5, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 07/49] target/arm: Add PAuth active bit to tbflags, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 08/49] target/arm: Introduce raise_exception_ra, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 21/49] target/arm: Introduce arm_stage1_mmu_idx, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 18/49] target/arm: Decode Load/store register (pac), Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 15/49] target/arm: Add new_pc argument to helper_exception_return, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 11/49] target/arm: Rearrange decode in disas_data_proc_1src,
Peter Maydell <=
- [Qemu-devel] [PULL 17/49] target/arm: Decode PAuth within disas_uncond_b_reg, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 20/49] target/arm: Introduce arm_mmu_idx, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 16/49] target/arm: Rearrange decode in disas_uncond_b_reg, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 22/49] target/arm: Create ARMVAParameters and helpers, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 33/49] target/arm: Enable PAuth for -cpu max, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 28/49] target/arm: Implement pauth_strip, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 34/49] target/arm: Enable PAuth for user-only, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 13/49] target/arm: Decode PAuth within disas_data_proc_2src, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 24/49] target/arm: Export aa64_va_parameters to internals.h, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 25/49] target/arm: Add aa64_va_parameters_both, Peter Maydell, 2019/01/18