Re: [PATCH 04/38] target/riscv: 16-bit Addition & Subtraction Instructions

[LIU Zhiwei]

On 2021/2/13 3:02, Richard Henderson wrote:
> On 2/12/21 7:02 AM, LIU Zhiwei wrote:
> > +static void tcg_gen_simd_add16(TCGv d, TCGv a, TCGv b)
> > +{
> > +    TCGv t1 = tcg_temp_new();
> > +    TCGv t2 = tcg_temp_new();
> > +
> > +    tcg_gen_andi_tl(t1, a, ~0xffff);
> > +    tcg_gen_add_tl(t2, a, b);
> > +    tcg_gen_add_tl(t1, t1, b);
> > +    tcg_gen_deposit_tl(d, t1, t2, 0, 16);
> > +
> > +    tcg_temp_free(t1);
> > +    tcg_temp_free(t2);
> > +}
> I will note that there are some helper functions, e.g. tcg_gen_vec_add16_i64
> (see the end of include/tcg/tcg-op-gvec.h), but those are explicitly i64, and
> you'll still need these for rv32.
Hi Richard,

Yes, that's really what I need.
Do you mind  continue to review the other patches in v1? Or should I 
send a v2 to fix current error at first?

Zhiwei
> r~