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Re: [PULL 00/19] riscv-to-apply queue
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From: |
Bin Meng |
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Subject: |
Re: [PULL 00/19] riscv-to-apply queue |
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Date: |
Thu, 18 Feb 2021 22:07:20 +0800 |
On Thu, Feb 18, 2021 at 9:26 PM Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Thu, 18 Feb 2021 at 01:59, Alistair Francis <alistair.francis@wdc.com>
> wrote:
> >
> > The following changes since commit 1af5629673bb5c1592d993f9fb6119a62845f576:
> >
> > Merge remote-tracking branch
> > 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20210216' into staging
> > (2021-02-17 14:44:18 +0000)
> >
> > are available in the Git repository at:
> >
> > git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20210217-1
> >
> > for you to fetch changes up to d0867d2dad4125d2295b28d6f91fa49cf034ffd2:
> >
> > hw/riscv: virt: Map high mmio for PCIe (2021-02-17 17:47:19 -0800)
> >
> > ----------------------------------------------------------------
> > RISC-V PR for 6.0
> >
> > This PR is a collection of RISC-V patches:
> > - Improvements to SiFive U OTP
> > - Upgrade OpenSBI to v0.9
> > - Support the QMP dump-guest-memory
> > - Add support for the SiFive SPI controller (sifive_u)
> > - Initial RISC-V system documentation
> > - A fix for the Goldfish RTC
> > - MAINTAINERS updates
> > - Support for high PCIe memory in the virt machine
>
> Fails to compile, 32 bit hosts:
>
> ../../hw/riscv/virt.c: In function 'virt_machine_init':
> ../../hw/riscv/virt.c:621:43: error: comparison is always false due to
> limited range of data type [-Werror=type-limits]
> if ((uint64_t)(machine->ram_size) > 10 * GiB) {
> ^
> ../../hw/riscv/virt.c:623:33: error: large integer implicitly
> truncated to unsigned type [-Werror=overflow]
> machine->ram_size = 10 * GiB;
> ^~
This kind of error is tricky. I wonder whether we should deprecate
32-bit host support though.
Regards,
Bin
- [PULL 11/19] docs/system: Sort targets in alphabetical order, (continued)
- [PULL 11/19] docs/system: Sort targets in alphabetical order, Alistair Francis, 2021/02/17
- [PULL 13/19] docs/system: riscv: Add documentation for sifive_u machine, Alistair Francis, 2021/02/17
- [PULL 12/19] docs/system: Add RISC-V documentation, Alistair Francis, 2021/02/17
- [PULL 14/19] goldfish_rtc: re-arm the alarm after migration, Alistair Francis, 2021/02/17
- [PULL 15/19] MAINTAINERS: Add a SiFive machine section, Alistair Francis, 2021/02/17
- [PULL 16/19] hw/riscv: Drop 'struct MemmapEntry', Alistair Francis, 2021/02/17
- [PULL 17/19] hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init(), Alistair Francis, 2021/02/17
- [PULL 18/19] hw/riscv: virt: Limit RAM size in a 32-bit system, Alistair Francis, 2021/02/17
- [PULL 19/19] hw/riscv: virt: Map high mmio for PCIe, Alistair Francis, 2021/02/17
- Re: [PULL 00/19] riscv-to-apply queue, Peter Maydell, 2021/02/18
- Re: [PULL 00/19] riscv-to-apply queue,
Bin Meng <=
- Re: [PULL 00/19] riscv-to-apply queue, Peter Maydell, 2021/02/18
- Re: [PULL 00/19] riscv-to-apply queue, Bin Meng, 2021/02/19
- Re: [PULL 00/19] riscv-to-apply queue, Philippe Mathieu-Daudé, 2021/02/19
- Re: [PULL 00/19] riscv-to-apply queue, Peter Maydell, 2021/02/19
- Re: [PULL 00/19] riscv-to-apply queue, Richard W.M. Jones, 2021/02/19