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[PULL 18/19] hw/riscv: virt: Limit RAM size in a 32-bit system
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From: |
Alistair Francis |
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Subject: |
[PULL 18/19] hw/riscv: virt: Limit RAM size in a 32-bit system |
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Date: |
Wed, 17 Feb 2021 17:59:33 -0800 |
From: Bin Meng <bin.meng@windriver.com>
RV32 supports 34-bit physical address hence the maximum RAM size
should be limitted. Limit the RAM size to 10 GiB, which leaves
some room for PCIe high mmio space.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210122122958.12311-4-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/virt.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 1d05bb3ef9..4f44509360 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -590,6 +590,19 @@ static void virt_machine_init(MachineState *machine)
}
}
+ /* limit RAM size in a 32-bit system */
+ if (riscv_is_32bit(&s->soc[0])) {
+ /*
+ * Cast machine->ram_size to 64-bit for 32-bit host,
+ * to make the build on 32-bit host happy.
+ */
+ if ((uint64_t)(machine->ram_size) > 10 * GiB) {
+ /* 32-bit host won't have a chance to execute here */
+ machine->ram_size = 10 * GiB;
+ error_report("Limitting RAM size to 10 GiB");
+ }
+ }
+
/* register system main memory (actual RAM) */
memory_region_init_ram(main_mem, NULL, "riscv_virt_board.ram",
machine->ram_size, &error_fatal);
--
2.30.0
- [PULL 08/19] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash, (continued)
- [PULL 08/19] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash, Alistair Francis, 2021/02/17
- [PULL 09/19] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card, Alistair Francis, 2021/02/17
- [PULL 10/19] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value, Alistair Francis, 2021/02/17
- [PULL 11/19] docs/system: Sort targets in alphabetical order, Alistair Francis, 2021/02/17
- [PULL 13/19] docs/system: riscv: Add documentation for sifive_u machine, Alistair Francis, 2021/02/17
- [PULL 12/19] docs/system: Add RISC-V documentation, Alistair Francis, 2021/02/17
- [PULL 14/19] goldfish_rtc: re-arm the alarm after migration, Alistair Francis, 2021/02/17
- [PULL 15/19] MAINTAINERS: Add a SiFive machine section, Alistair Francis, 2021/02/17
- [PULL 16/19] hw/riscv: Drop 'struct MemmapEntry', Alistair Francis, 2021/02/17
- [PULL 17/19] hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init(), Alistair Francis, 2021/02/17
- [PULL 18/19] hw/riscv: virt: Limit RAM size in a 32-bit system,
Alistair Francis <=
- [PULL 19/19] hw/riscv: virt: Map high mmio for PCIe, Alistair Francis, 2021/02/17
- Re: [PULL 00/19] riscv-to-apply queue, Peter Maydell, 2021/02/18
- Re: [PULL 00/19] riscv-to-apply queue, Bin Meng, 2021/02/18
- Re: [PULL 00/19] riscv-to-apply queue, Peter Maydell, 2021/02/18
- Re: [PULL 00/19] riscv-to-apply queue, Bin Meng, 2021/02/19
- Re: [PULL 00/19] riscv-to-apply queue, Philippe Mathieu-Daudé, 2021/02/19
- Re: [PULL 00/19] riscv-to-apply queue, Peter Maydell, 2021/02/19
- Re: [PULL 00/19] riscv-to-apply queue, Richard W.M. Jones, 2021/02/19