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[PATCH 09/28] tcg/ppc: Split out tcg_out_bswap64
From: |
Richard Henderson |
Subject: |
[PATCH 09/28] tcg/ppc: Split out tcg_out_bswap64 |
Date: |
Mon, 14 Jun 2021 01:37:41 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/ppc/tcg-target.c.inc | 51 +++++++++++++++++-----------------------
1 file changed, 21 insertions(+), 30 deletions(-)
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index f0e42e4b88..690c77b4da 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -809,6 +809,26 @@ static void tcg_out_bswap32(TCGContext *s, TCGReg dst,
TCGReg src)
tcg_out_mov(s, TCG_TYPE_REG, dst, tmp);
}
+static void tcg_out_bswap64(TCGContext *s, TCGReg dst, TCGReg src)
+{
+ TCGReg t0 = dst == src ? TCG_REG_R0 : dst;
+ TCGReg t1 = dst == src ? dst : TCG_REG_R0;
+
+ /* src = abcd efgh */
+ tcg_out_rlw(s, RLWINM, t0, src, 8, 0, 31); /* t0 = 0000 fghe */
+ tcg_out_rlw(s, RLWIMI, t0, src, 24, 0, 7); /* t0 = 0000 hghe */
+ tcg_out_rlw(s, RLWIMI, t0, src, 24, 16, 23); /* t0 = 0000 hgfe */
+
+ tcg_out_rld(s, RLDICL, t0, t0, 32, 0); /* t0 = hgfe 0000 */
+ tcg_out_rld(s, RLDICL, t1, src, 32, 0); /* t1 = efgh abcd */
+
+ tcg_out_rlw(s, RLWIMI, t0, t1, 8, 0, 31); /* t0 = hgfe bcda */
+ tcg_out_rlw(s, RLWIMI, t0, t1, 24, 0, 7); /* t0 = hgfe dcda */
+ tcg_out_rlw(s, RLWIMI, t0, t1, 24, 16, 23); /* t0 = hgfe dcba */
+
+ tcg_out_mov(s, TCG_TYPE_REG, dst, t0);
+}
+
/* Emit a move into ret of arg, if it can be done in one insn. */
static bool tcg_out_movi_one(TCGContext *s, TCGReg ret, tcg_target_long arg)
{
@@ -2806,37 +2826,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_bswap32_i64:
tcg_out_bswap32(s, args[0], args[1]);
break;
-
case INDEX_op_bswap64_i64:
- a0 = args[0], a1 = args[1], a2 = TCG_REG_R0;
- if (a0 == a1) {
- a0 = TCG_REG_R0;
- a2 = a1;
- }
-
- /* a1 = # abcd efgh */
- /* a0 = rl32(a1, 8) # 0000 fghe */
- tcg_out_rlw(s, RLWINM, a0, a1, 8, 0, 31);
- /* a0 = dep(a0, rl32(a1, 24), 0xff000000) # 0000 hghe */
- tcg_out_rlw(s, RLWIMI, a0, a1, 24, 0, 7);
- /* a0 = dep(a0, rl32(a1, 24), 0x0000ff00) # 0000 hgfe */
- tcg_out_rlw(s, RLWIMI, a0, a1, 24, 16, 23);
-
- /* a0 = rl64(a0, 32) # hgfe 0000 */
- /* a2 = rl64(a1, 32) # efgh abcd */
- tcg_out_rld(s, RLDICL, a0, a0, 32, 0);
- tcg_out_rld(s, RLDICL, a2, a1, 32, 0);
-
- /* a0 = dep(a0, rl32(a2, 8), 0xffffffff) # hgfe bcda */
- tcg_out_rlw(s, RLWIMI, a0, a2, 8, 0, 31);
- /* a0 = dep(a0, rl32(a2, 24), 0xff000000) # hgfe dcda */
- tcg_out_rlw(s, RLWIMI, a0, a2, 24, 0, 7);
- /* a0 = dep(a0, rl32(a2, 24), 0x0000ff00) # hgfe dcba */
- tcg_out_rlw(s, RLWIMI, a0, a2, 24, 16, 23);
-
- if (a0 == 0) {
- tcg_out_mov(s, TCG_TYPE_REG, args[0], a0);
- }
+ tcg_out_bswap64(s, args[0], args[1]);
break;
case INDEX_op_deposit_i32:
--
2.25.1
- [PATCH 14/28] tcg/mips: Support bswap flags in tcg_out_bswap32, (continued)
- [PATCH 14/28] tcg/mips: Support bswap flags in tcg_out_bswap32, Richard Henderson, 2021/06/14
- [PATCH 17/28] tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64, Richard Henderson, 2021/06/14
- [PATCH 18/28] tcg: Make use of bswap flags in tcg_gen_qemu_ld_*, Richard Henderson, 2021/06/14
- [PATCH 09/28] tcg/ppc: Split out tcg_out_bswap64,
Richard Henderson <=
- [PATCH 11/28] tcg/ppc: Use power10 byte-reverse instructions, Richard Henderson, 2021/06/14
- [PATCH 16/28] tcg: Handle new bswap flags during optimize, Richard Henderson, 2021/06/14
- [PATCH 15/28] tcg/tci: Support bswap flags, Richard Henderson, 2021/06/14
- [PATCH 20/28] target/arm: Improve REV32, Richard Henderson, 2021/06/14
- [PATCH 19/28] tcg: Make use of bswap flags in tcg_gen_qemu_st_*, Richard Henderson, 2021/06/14