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[PULL 08/28] target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 08/28] target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c |
Date: |
Wed, 25 Aug 2021 15:01:51 +0200 |
Extract NEC Vr54xx helpers from op_helper.c to a new file:
'vr54xx_helper.c'.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201120210844.2625602-14-f4bug@amsat.org>
---
target/mips/tcg/op_helper.c | 118 --------------------------
target/mips/tcg/vr54xx_helper.c | 142 ++++++++++++++++++++++++++++++++
target/mips/tcg/meson.build | 1 +
3 files changed, 143 insertions(+), 118 deletions(-)
create mode 100644 target/mips/tcg/vr54xx_helper.c
diff --git a/target/mips/tcg/op_helper.c b/target/mips/tcg/op_helper.c
index fafbf1faca7..ef3dafcbb3f 100644
--- a/target/mips/tcg/op_helper.c
+++ b/target/mips/tcg/op_helper.c
@@ -26,124 +26,6 @@
#include "exec/memop.h"
#include "fpu_helper.h"
-/* 64 bits arithmetic for 32 bits hosts */
-static inline uint64_t get_HILO(CPUMIPSState *env)
-{
- return ((uint64_t)(env->active_tc.HI[0]) << 32) |
- (uint32_t)env->active_tc.LO[0];
-}
-
-static inline target_ulong set_HIT0_LO(CPUMIPSState *env, uint64_t HILO)
-{
- env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
- return env->active_tc.HI[0] = (int32_t)(HILO >> 32);
-}
-
-static inline target_ulong set_HI_LOT0(CPUMIPSState *env, uint64_t HILO)
-{
- target_ulong tmp = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
- env->active_tc.HI[0] = (int32_t)(HILO >> 32);
- return tmp;
-}
-
-/* Multiplication variants of the vr54xx. */
-target_ulong helper_muls(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, 0 - ((int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2));
-}
-
-target_ulong helper_mulsu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, 0 - (uint64_t)(uint32_t)arg1 *
- (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_macc(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_macchi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_maccu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (uint64_t)get_HILO(env) +
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_macchiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (uint64_t)get_HILO(env) +
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_msac(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_msachi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_msacu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (uint64_t)get_HILO(env) -
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_msachiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (uint64_t)get_HILO(env) -
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_mulhi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_mulhiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (uint64_t)(uint32_t)arg1 *
- (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_mulshi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, 0 - (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_mulshiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, 0 - (uint64_t)(uint32_t)arg1 *
- (uint64_t)(uint32_t)arg2);
-}
-
static inline target_ulong bitswap(target_ulong v)
{
v = ((v >> 1) & (target_ulong)0x5555555555555555ULL) |
diff --git a/target/mips/tcg/vr54xx_helper.c b/target/mips/tcg/vr54xx_helper.c
new file mode 100644
index 00000000000..2255bd11163
--- /dev/null
+++ b/target/mips/tcg/vr54xx_helper.c
@@ -0,0 +1,142 @@
+/*
+ * MIPS VR5432 emulation helpers
+ *
+ * Copyright (c) 2004-2005 Jocelyn Mayer
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "exec/helper-proto.h"
+
+/* 64 bits arithmetic for 32 bits hosts */
+static inline uint64_t get_HILO(CPUMIPSState *env)
+{
+ return ((uint64_t)(env->active_tc.HI[0]) << 32) |
+ (uint32_t)env->active_tc.LO[0];
+}
+
+static inline target_ulong set_HIT0_LO(CPUMIPSState *env, uint64_t HILO)
+{
+ env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
+ return env->active_tc.HI[0] = (int32_t)(HILO >> 32);
+}
+
+static inline target_ulong set_HI_LOT0(CPUMIPSState *env, uint64_t HILO)
+{
+ target_ulong tmp = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
+ env->active_tc.HI[0] = (int32_t)(HILO >> 32);
+ return tmp;
+}
+
+/* Multiplication variants of the vr54xx. */
+target_ulong helper_muls(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, 0 - ((int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2));
+}
+
+target_ulong helper_mulsu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, 0 - (uint64_t)(uint32_t)arg1 *
+ (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_macc(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_macchi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_maccu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (uint64_t)get_HILO(env) + (uint64_t)(uint32_t)arg1
*
+
(uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_macchiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (uint64_t)get_HILO(env) + (uint64_t)(uint32_t)arg1
*
+
(uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_msac(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_msachi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_msacu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (uint64_t)get_HILO(env) - (uint64_t)(uint32_t)arg1
*
+
(uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_msachiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (uint64_t)get_HILO(env) - (uint64_t)(uint32_t)arg1
*
+
(uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_mulhi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_mulhiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (uint64_t)(uint32_t)arg1 *
+ (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_mulshi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, 0 - (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_mulshiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, 0 - (uint64_t)(uint32_t)arg1 *
+ (uint64_t)(uint32_t)arg2);
+}
diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build
index 70fa3dd57df..ff618a159b7 100644
--- a/target/mips/tcg/meson.build
+++ b/target/mips/tcg/meson.build
@@ -18,6 +18,7 @@
'translate.c',
'translate_addr_const.c',
'txx9_translate.c',
+ 'vr54xx_helper.c',
))
mips_ss.add(when: 'TARGET_MIPS64', if_true: files(
'tx79_translate.c',
--
2.31.1
- [PULL 00/28] MIPS patches for 2021-08-25, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 01/28] target/mips: Remove JR opcode unused arguments, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 02/28] target/mips: Simplify PREF opcode, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 03/28] target/mips: Decode vendor extensions before MIPS ISAs, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 04/28] target/mips: Merge 32-bit/64-bit Release6 decodetree definitions, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 06/28] target/mips: Introduce generic TRANS() macro for decodetree helpers, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 05/28] target/mips: Rename 'rtype' as 'r', Philippe Mathieu-Daudé, 2021/08/25
- [PULL 07/28] target/mips: Extract NEC Vr54xx helper definitions, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 08/28] target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c,
Philippe Mathieu-Daudé <=
- [PULL 09/28] target/mips: Introduce decodetree structure for NEC Vr54xx extension, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 10/28] target/mips: Convert Vr54xx MACC* opcodes to decodetree, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 11/28] target/mips: Convert Vr54xx MUL* opcodes to decodetree, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 12/28] target/mips: Convert Vr54xx MSA* opcodes to decodetree, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 13/28] target/mips: Document Loongson-3A CPU definitions, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 14/28] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 15/28] target/mips: Remove duplicated check_cp1_enabled() calls in Loongson EXT, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 16/28] target/mips: Remove gen_helper_0e3i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 17/28] target/mips: Remove gen_helper_1e2i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 18/28] target/mips: Use tcg_constant_i32() in gen_helper_0e2i(), Philippe Mathieu-Daudé, 2021/08/25