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[PULL 17/30] tcg/i386: Expand scalar rotate with avx512 insns
From: |
Richard Henderson |
Subject: |
[PULL 17/30] tcg/i386: Expand scalar rotate with avx512 insns |
Date: |
Thu, 3 Mar 2022 10:59:31 -1000 |
Expand 32-bit and 64-bit scalar rotate with VPRO[LR]V;
expand 16-bit scalar rotate with VPSHLDV.
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 49 +++++++++++++++++++++++----------------
1 file changed, 29 insertions(+), 20 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 1fbb4b0593..edf0d066e7 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -3602,26 +3602,6 @@ static void expand_vec_rotli(TCGType type, unsigned vece,
tcg_temp_free_vec(t);
}
-static void expand_vec_rotls(TCGType type, unsigned vece,
- TCGv_vec v0, TCGv_vec v1, TCGv_i32 lsh)
-{
- TCGv_i32 rsh;
- TCGv_vec t;
-
- tcg_debug_assert(vece != MO_8);
-
- t = tcg_temp_new_vec(type);
- rsh = tcg_temp_new_i32();
-
- tcg_gen_neg_i32(rsh, lsh);
- tcg_gen_andi_i32(rsh, rsh, (8 << vece) - 1);
- tcg_gen_shls_vec(vece, t, v1, lsh);
- tcg_gen_shrs_vec(vece, v0, v1, rsh);
- tcg_gen_or_vec(vece, v0, v0, t);
- tcg_temp_free_vec(t);
- tcg_temp_free_i32(rsh);
-}
-
static void expand_vec_rotv(TCGType type, unsigned vece, TCGv_vec v0,
TCGv_vec v1, TCGv_vec sh, bool right)
{
@@ -3648,6 +3628,35 @@ static void expand_vec_rotv(TCGType type, unsigned vece,
TCGv_vec v0,
tcg_temp_free_vec(t);
}
+static void expand_vec_rotls(TCGType type, unsigned vece,
+ TCGv_vec v0, TCGv_vec v1, TCGv_i32 lsh)
+{
+ TCGv_vec t = tcg_temp_new_vec(type);
+
+ tcg_debug_assert(vece != MO_8);
+
+ if (vece >= MO_32 ? have_avx512vl : have_avx512vbmi2) {
+ tcg_gen_dup_i32_vec(vece, t, lsh);
+ if (vece >= MO_32) {
+ tcg_gen_rotlv_vec(vece, v0, v1, t);
+ } else {
+ expand_vec_rotv(type, vece, v0, v1, t, false);
+ }
+ } else {
+ TCGv_i32 rsh = tcg_temp_new_i32();
+
+ tcg_gen_neg_i32(rsh, lsh);
+ tcg_gen_andi_i32(rsh, rsh, (8 << vece) - 1);
+ tcg_gen_shls_vec(vece, t, v1, lsh);
+ tcg_gen_shrs_vec(vece, v0, v1, rsh);
+ tcg_gen_or_vec(vece, v0, v0, t);
+
+ tcg_temp_free_i32(rsh);
+ }
+
+ tcg_temp_free_vec(t);
+}
+
static void expand_vec_mul(TCGType type, unsigned vece,
TCGv_vec v0, TCGv_vec v1, TCGv_vec v2)
{
--
2.25.1
- [PULL 06/30] tcg/i386: Detect AVX512, (continued)
- [PULL 06/30] tcg/i386: Detect AVX512, Richard Henderson, 2022/03/03
- [PULL 08/30] tcg/i386: Use tcg_can_emit_vec_op in expand_vec_cmp_noinv, Richard Henderson, 2022/03/03
- [PULL 09/30] tcg/i386: Implement avx512 variable shifts, Richard Henderson, 2022/03/03
- [PULL 10/30] tcg/i386: Implement avx512 scalar shift, Richard Henderson, 2022/03/03
- [PULL 11/30] tcg/i386: Implement avx512 immediate sari shift, Richard Henderson, 2022/03/03
- [PULL 12/30] tcg/i386: Implement avx512 immediate rotate, Richard Henderson, 2022/03/03
- [PULL 13/30] tcg/i386: Implement avx512 variable rotate, Richard Henderson, 2022/03/03
- [PULL 20/30] tcg/i386: Implement more logical operations for avx512, Richard Henderson, 2022/03/03
- [PULL 18/30] tcg/i386: Implement avx512 min/max/abs, Richard Henderson, 2022/03/03
- [PULL 15/30] tcg/i386: Expand vector word rotate as avx512vbmi2 shift-double, Richard Henderson, 2022/03/03
- [PULL 17/30] tcg/i386: Expand scalar rotate with avx512 insns,
Richard Henderson <=
- [PULL 21/30] tcg/i386: Implement bitsel for avx512, Richard Henderson, 2022/03/03
- [PULL 28/30] tcg/mips: Support TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03
- [PULL 26/30] linux-user: Support TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03
- [PULL 14/30] tcg/i386: Support avx512vbmi2 vector shift-double instructions, Richard Henderson, 2022/03/03
- [PULL 30/30] tcg/loongarch64: Support TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03
- [PULL 24/30] accel/tcg: Support TCG_TARGET_SIGNED_ADDR32 for softmmu, Richard Henderson, 2022/03/03
- [PULL 22/30] tcg: Add TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03
- [PULL 25/30] accel/tcg: Add guest_base_signed_addr32 for user-only, Richard Henderson, 2022/03/03
- [PULL 16/30] tcg/i386: Remove rotls_vec from tcg_target_op_def, Richard Henderson, 2022/03/03
- [PULL 29/30] tcg/riscv: Support TCG_TARGET_SIGNED_ADDR32, Richard Henderson, 2022/03/03