[RFC PATCH 0/6] softfloat 128-bit integer support

[matheus . ferst]

From: Matheus Ferst <matheus.ferst@eldorado.org.br>

This RFC is a first attempt at implementing the 128-bit integer
conversion routines in softfloat, as required by the xscv[su]qqp and
xscvqp[su]qz instructions of PowerISA v3.1.

Instead of using int128.h, int-to-float routines receive the 128-bit
numbers through a pair of 64-bit values, and float-to-int conversions
use a pointer to return the lower half of the result.

We only need the parts128 methods, but since the difference to parts64
ones seemed minor, I included both in this patch.

RFC:
 - Should we use struct Int128 instead of 64-bit value pairs?
 - I've not tested the float64 methods since the PPC instructions only
   use the quad-precision routines. Should we keep them in the final
   version?

Matheus Ferst (6):
  softfloat: add uint128_to_float* conversion methods
  softfloat: add int128_to_float* conversion methods
  softfloat: add float*_to_uint128 conversion methods
  softfloat: add float*_to_int128 conversion methods
  target/ppc: implement xscv[su]qqp
  target/ppc: implement xscvqp[su]qz

 fpu/softfloat-parts.c.inc           | 202 ++++++++++++++++++++++++++++
 fpu/softfloat.c                     | 161 ++++++++++++++++++++++
 include/fpu/softfloat.h             |  23 ++++
 target/ppc/fpu_helper.c             |  34 +++++
 target/ppc/helper.h                 |   4 +
 target/ppc/insn32.decode            |   7 +
 target/ppc/translate/vsx-impl.c.inc |  22 +++
 7 files changed, 453 insertions(+)

-- 
2.25.1