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[PULL 37/54] target/arm: Use tcg_constant in SINCDEC, INCDEC
From: |
Peter Maydell |
Subject: |
[PULL 37/54] target/arm: Use tcg_constant in SINCDEC, INCDEC |
Date: |
Thu, 28 Apr 2022 15:39:41 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-38-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-sve.c | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 8b173f5c4aa..9321457f31e 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -2103,9 +2103,7 @@ static bool trans_SINCDEC_r_32(DisasContext *s,
arg_incdec_cnt *a)
tcg_gen_ext32s_i64(reg, reg);
}
} else {
- TCGv_i64 t = tcg_const_i64(inc);
- do_sat_addsub_32(reg, t, a->u, a->d);
- tcg_temp_free_i64(t);
+ do_sat_addsub_32(reg, tcg_constant_i64(inc), a->u, a->d);
}
return true;
}
@@ -2122,9 +2120,7 @@ static bool trans_SINCDEC_r_64(DisasContext *s,
arg_incdec_cnt *a)
TCGv_i64 reg = cpu_reg(s, a->rd);
if (inc != 0) {
- TCGv_i64 t = tcg_const_i64(inc);
- do_sat_addsub_64(reg, t, a->u, a->d);
- tcg_temp_free_i64(t);
+ do_sat_addsub_64(reg, tcg_constant_i64(inc), a->u, a->d);
}
return true;
}
@@ -2141,11 +2137,10 @@ static bool trans_INCDEC_v(DisasContext *s,
arg_incdec2_cnt *a)
if (inc != 0) {
if (sve_access_check(s)) {
- TCGv_i64 t = tcg_const_i64(a->d ? -inc : inc);
tcg_gen_gvec_adds(a->esz, vec_full_reg_offset(s, a->rd),
vec_full_reg_offset(s, a->rn),
- t, fullsz, fullsz);
- tcg_temp_free_i64(t);
+ tcg_constant_i64(a->d ? -inc : inc),
+ fullsz, fullsz);
}
} else {
do_mov_z(s, a->rd, a->rn);
@@ -2165,9 +2160,8 @@ static bool trans_SINCDEC_v(DisasContext *s,
arg_incdec2_cnt *a)
if (inc != 0) {
if (sve_access_check(s)) {
- TCGv_i64 t = tcg_const_i64(inc);
- do_sat_addsub_vec(s, a->esz, a->rd, a->rn, t, a->u, a->d);
- tcg_temp_free_i64(t);
+ do_sat_addsub_vec(s, a->esz, a->rd, a->rn,
+ tcg_constant_i64(inc), a->u, a->d);
}
} else {
do_mov_z(s, a->rd, a->rn);
--
2.25.1
- [PULL 18/54] target/arm: Use tcg_constant in simd shift expanders, (continued)
- [PULL 18/54] target/arm: Use tcg_constant in simd shift expanders, Peter Maydell, 2022/04/28
- [PULL 19/54] target/arm: Use tcg_constant in simd fp/int conversion, Peter Maydell, 2022/04/28
- [PULL 20/54] target/arm: Use tcg_constant in 2misc expanders, Peter Maydell, 2022/04/28
- [PULL 23/54] target/arm: Use tcg_constant for disas_iwmmxt_insn, Peter Maydell, 2022/04/28
- [PULL 22/54] target/arm: Use tcg_constant for aa32 exceptions, Peter Maydell, 2022/04/28
- [PULL 29/54] target/arm: Use tcg_constant for MOVW, UMAAL, CRC32, Peter Maydell, 2022/04/28
- [PULL 17/54] target/arm: Use tcg_constant in disas_fp*, Peter Maydell, 2022/04/28
- [PULL 34/54] target/arm: Use tcg_constant in trans_CPS_v7m, Peter Maydell, 2022/04/28
- [PULL 35/54] target/arm: Use tcg_constant in trans_CSEL, Peter Maydell, 2022/04/28
- [PULL 41/54] target/arm: Use tcg_constant in WHILE, Peter Maydell, 2022/04/28
- [PULL 37/54] target/arm: Use tcg_constant in SINCDEC, INCDEC,
Peter Maydell <=
- [PULL 43/54] target/arm: Use tcg_constant in SUBR, Peter Maydell, 2022/04/28
- [PULL 44/54] target/arm: Use tcg_constant in do_zzi_{sat, ool}, do_fp_imm, Peter Maydell, 2022/04/28
- [PULL 52/54] target/arm: Advertise support for FEAT_TTL, Peter Maydell, 2022/04/28
- [PULL 26/54] target/arm: Use tcg_constant for do_coproc_insn, Peter Maydell, 2022/04/28
- [PULL 39/54] target/arm: Use tcg_constant in {incr, wrap}_last_active, Peter Maydell, 2022/04/28
- [PULL 50/54] hw/arm/smmuv3: Cache event fault record, Peter Maydell, 2022/04/28
- [PULL 53/54] target/arm: Advertise support for FEAT_BBM level 2, Peter Maydell, 2022/04/28
- [PULL 32/54] target/arm: Use tcg_constant in LDM, STM, Peter Maydell, 2022/04/28
- [PULL 27/54] target/arm: Use tcg_constant for gen_srs, Peter Maydell, 2022/04/28
- [PULL 28/54] target/arm: Use tcg_constant for op_s_{rri,rxi}_rot, Peter Maydell, 2022/04/28