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[PULL v3 34/43] hw/intc: sifive_plic: Improve robustness of the PLIC con
From: |
Alistair Francis |
Subject: |
[PULL v3 34/43] hw/intc: sifive_plic: Improve robustness of the PLIC config parser |
Date: |
Fri, 6 Jan 2023 13:13:48 +1000 |
From: Bin Meng <bmeng@tinylab.org>
At present the PLIC config parser can only handle legal config string
like "MS,MS". However if a config string like ",MS,MS,,MS,MS,," is
given the parser won't get the correct configuration.
This commit improves the config parser to make it more robust.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20221211030829.802437-7-bmeng@tinylab.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/intc/sifive_plic.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c
index 936dcf74bc..c9af94a888 100644
--- a/hw/intc/sifive_plic.c
+++ b/hw/intc/sifive_plic.c
@@ -290,7 +290,7 @@ static void sifive_plic_reset(DeviceState *dev)
*/
static void parse_hart_config(SiFivePLICState *plic)
{
- int addrid, hartid, modes;
+ int addrid, hartid, modes, m;
const char *p;
char c;
@@ -299,11 +299,13 @@ static void parse_hart_config(SiFivePLICState *plic)
p = plic->hart_config;
while ((c = *p++)) {
if (c == ',') {
- addrid += ctpop8(modes);
- modes = 0;
- hartid++;
+ if (modes) {
+ addrid += ctpop8(modes);
+ hartid++;
+ modes = 0;
+ }
} else {
- int m = 1 << char_to_mode(c);
+ m = 1 << char_to_mode(c);
if (modes == (modes | m)) {
error_report("plic: duplicate mode '%c' in config: %s",
c, plic->hart_config);
@@ -314,8 +316,9 @@ static void parse_hart_config(SiFivePLICState *plic)
}
if (modes) {
addrid += ctpop8(modes);
+ hartid++;
+ modes = 0;
}
- hartid++;
plic->num_addrs = addrid;
plic->num_harts = hartid;
@@ -326,11 +329,16 @@ static void parse_hart_config(SiFivePLICState *plic)
p = plic->hart_config;
while ((c = *p++)) {
if (c == ',') {
- hartid++;
+ if (modes) {
+ hartid++;
+ modes = 0;
+ }
} else {
+ m = char_to_mode(c);
plic->addr_config[addrid].addrid = addrid;
plic->addr_config[addrid].hartid = hartid;
- plic->addr_config[addrid].mode = char_to_mode(c);
+ plic->addr_config[addrid].mode = m;
+ modes |= (1 << m);
addrid++;
}
}
--
2.39.0
- [PULL v3 24/43] target/riscv: Set pc_succ_insn for !rvc illegal insn, (continued)
- [PULL v3 24/43] target/riscv: Set pc_succ_insn for !rvc illegal insn, Alistair Francis, 2023/01/05
- [PULL v3 25/43] target/riscv: Simplify helper_sret() a little bit, Alistair Francis, 2023/01/05
- [PULL v3 26/43] target/riscv: Clear mstatus.MPRV when leaving M-mode for priv spec 1.12+, Alistair Francis, 2023/01/05
- [PULL v3 27/43] RISC-V: Add Zawrs ISA extension support, Alistair Francis, 2023/01/05
- [PULL v3 28/43] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC, Alistair Francis, 2023/01/05
- [PULL v3 29/43] hw/intc: Select MSI_NONBROKEN in RISC-V AIA interrupt controllers, Alistair Francis, 2023/01/05
- [PULL v3 30/43] hw/riscv: Fix opentitan dependency to SIFIVE_PLIC, Alistair Francis, 2023/01/05
- [PULL v3 31/43] hw/riscv: Sort machines Kconfig options in alphabetical order, Alistair Francis, 2023/01/05
- [PULL v3 33/43] hw/intc: sifive_plic: Drop PLICMode_H, Alistair Francis, 2023/01/05
- [PULL v3 37/43] hw/riscv: microchip_pfsoc: Fix the number of interrupt sources of PLIC, Alistair Francis, 2023/01/05
- [PULL v3 34/43] hw/intc: sifive_plic: Improve robustness of the PLIC config parser,
Alistair Francis <=
- [PULL v3 36/43] hw/intc: sifive_plic: Update "num-sources" property default value, Alistair Francis, 2023/01/05
- [PULL v3 40/43] hw/riscv: virt: Fix the value of "riscv, ndev" in the dtb, Alistair Francis, 2023/01/05
- [PULL v3 35/43] hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in sifive_plic_realize(), Alistair Francis, 2023/01/05
- [PULL v3 38/43] hw/riscv: sifive_e: Fix the number of interrupt sources of PLIC, Alistair Francis, 2023/01/05
- [PULL v3 39/43] hw/riscv: sifive_u: Avoid using magic number for "riscv, ndev", Alistair Francis, 2023/01/05
- [PULL v3 41/43] hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0, Alistair Francis, 2023/01/05
- [PULL v3 43/43] hw/intc: sifive_plic: Fix the pending register range check, Alistair Francis, 2023/01/05
- [PULL v3 32/43] hw/riscv: spike: Remove misleading comments, Alistair Francis, 2023/01/05
- [PULL v3 42/43] hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization, Alistair Francis, 2023/01/05
- Re: [PULL v3 00/43] riscv-to-apply queue, Peter Maydell, 2023/01/07