[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v5 14/36] tcg: Add basic data movement for TCGv_i128
From: |
Alex Bennée |
Subject: |
Re: [PATCH v5 14/36] tcg: Add basic data movement for TCGv_i128 |
Date: |
Fri, 27 Jan 2023 18:23:34 +0000 |
User-agent: |
mu4e 1.9.16; emacs 29.0.60 |
Richard Henderson <richard.henderson@linaro.org> writes:
> Add code generation functions for data movement between
> TCGv_i128 (mov) and to/from TCGv_i64 (concat, extract).
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/tcg/tcg-op.h | 4 ++++
> tcg/tcg-internal.h | 13 +++++++++++++
> tcg/tcg-op.c | 20 ++++++++++++++++++++
> 3 files changed, 37 insertions(+)
>
> diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
> index 79b1cf786f..c4276767d1 100644
> --- a/include/tcg/tcg-op.h
> +++ b/include/tcg/tcg-op.h
> @@ -712,6 +712,10 @@ void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
> void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
> void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
>
> +void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src);
> +void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg);
> +void tcg_gen_concat_i64_i128(TCGv_i128 ret, TCGv_i64 lo, TCGv_i64 hi);
> +
> static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64
> hi)
> {
> tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
> diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h
> index 33f1d8b411..e542a4e9b7 100644
> --- a/tcg/tcg-internal.h
> +++ b/tcg/tcg-internal.h
> @@ -117,4 +117,17 @@ extern TCGv_i32 TCGV_LOW(TCGv_i64) QEMU_ERROR("32-bit
> code path is reachable");
> extern TCGv_i32 TCGV_HIGH(TCGv_i64) QEMU_ERROR("32-bit code path is
> reachable");
> #endif
>
> +static inline TCGv_i64 TCGV128_LOW(TCGv_i128 t)
> +{
> + /* For 32-bit, offset by 2, which may then have TCGV_{LOW,HIGH} applied.
> */
> + int o = HOST_BIG_ENDIAN ? 64 / TCG_TARGET_REG_BITS : 0;
> + return temp_tcgv_i64(tcgv_i128_temp(t) + o);
> +}
> +
> +static inline TCGv_i64 TCGV128_HIGH(TCGv_i128 t)
> +{
> + int o = HOST_BIG_ENDIAN ? 0 : 64 / TCG_TARGET_REG_BITS;
> + return temp_tcgv_i64(tcgv_i128_temp(t) + o);
> +}
> +
I was going to question the names but I guess its following the style of
the other functions in the file so:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
- [PATCH v5 08/36] include/qemu/int128: Use Int128 structure for TCI, (continued)
- [PATCH v5 08/36] include/qemu/int128: Use Int128 structure for TCI, Richard Henderson, 2023/01/25
- [PATCH v5 10/36] tcg/tci: Fix big-endian return register ordering, Richard Henderson, 2023/01/25
- [PATCH v5 11/36] tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128, Richard Henderson, 2023/01/25
- [PATCH v5 12/36] tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128, Richard Henderson, 2023/01/25
- [PATCH v5 14/36] tcg: Add basic data movement for TCGv_i128, Richard Henderson, 2023/01/25
- Re: [PATCH v5 14/36] tcg: Add basic data movement for TCGv_i128,
Alex Bennée <=
- [PATCH v5 13/36] tcg: Add temp allocation for TCGv_i128, Richard Henderson, 2023/01/25
- [PATCH v5 15/36] tcg: Add guest load/store primitives for TCGv_i128, Richard Henderson, 2023/01/25
- [PATCH v5 16/36] tcg: Add tcg_gen_{non}atomic_cmpxchg_i128, Richard Henderson, 2023/01/25
- [PATCH v5 17/36] tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64}, Richard Henderson, 2023/01/25