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[PULL 07/37] hw/arm/mainstone: Simplify since the machines are little-en
From: |
Peter Maydell |
Subject: |
[PULL 07/37] hw/arm/mainstone: Simplify since the machines are little-endian only |
Date: |
Thu, 5 Mar 2020 16:30:30 +0000 |
From: Philippe Mathieu-Daudé <address@hidden>
We only build the little-endian softmmu configurations. Checking
for big endian is pointless, remove the unused code.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/mainstone.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c
index 6e64dfab506..10420170866 100644
--- a/hw/arm/mainstone.c
+++ b/hw/arm/mainstone.c
@@ -119,7 +119,6 @@ static void mainstone_common_init(MemoryRegion
*address_space_mem,
DeviceState *mst_irq;
DriveInfo *dinfo;
int i;
- int be;
MemoryRegion *rom = g_new(MemoryRegion, 1);
/* Setup CPU & memory */
@@ -130,11 +129,6 @@ static void mainstone_common_init(MemoryRegion
*address_space_mem,
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);
-#ifdef TARGET_WORDS_BIGENDIAN
- be = 1;
-#else
- be = 0;
-#endif
/* There are two 32MiB flash devices on the board */
for (i = 0; i < 2; i ++) {
dinfo = drive_get(IF_PFLASH, 0, i);
@@ -142,7 +136,7 @@ static void mainstone_common_init(MemoryRegion
*address_space_mem,
i ? "mainstone.flash1" : "mainstone.flash0",
MAINSTONE_FLASH,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- sector_len, 4, 0, 0, 0, 0, be)) {
+ sector_len, 4, 0, 0, 0, 0, 0)) {
error_report("Error registering flash memory");
exit(1);
}
--
2.20.1
- [PULL 34/37] target/arm: Apply TBI to ESR_ELx in helper_exception_return, (continued)
- [PULL 34/37] target/arm: Apply TBI to ESR_ELx in helper_exception_return, Peter Maydell, 2020/03/05
- [PULL 36/37] target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva, Peter Maydell, 2020/03/05
- [PULL 31/37] target/arm: Replicate TBI/TBID bits for single range regimes, Peter Maydell, 2020/03/05
- [PULL 32/37] target/arm: Optimize cpu_mmu_index, Peter Maydell, 2020/03/05
- [PULL 33/37] target/arm: Introduce core_to_aa64_mmu_idx, Peter Maydell, 2020/03/05
- [PULL 20/37] target/arm: Honor the HCR_EL2.{TVM,TRVM} bits, Peter Maydell, 2020/03/05
- [PULL 23/37] target/arm: Honor the HCR_EL2.TPCP bit, Peter Maydell, 2020/03/05
- [PULL 37/37] target/arm: Clean address for DC ZVA, Peter Maydell, 2020/03/05
- [PULL 35/37] target/arm: Move helper_dc_zva to helper-a64.c, Peter Maydell, 2020/03/05
- [PULL 01/37] hw/arm: versal: Add support for the LPD ADMAs, Peter Maydell, 2020/03/05
- [PULL 07/37] hw/arm/mainstone: Simplify since the machines are little-endian only,
Peter Maydell <=
- [PULL 13/37] hw/arm/strongarm: move timer_new from init() into realize() to avoid memleaks, Peter Maydell, 2020/03/05
- [PULL 12/37] hw/arm/spitz: move timer_new from init() into realize() to avoid memleaks, Peter Maydell, 2020/03/05
- [PULL 14/37] hw/timer/cadence_ttc: move timer_new from init() into realize() to avoid memleaks, Peter Maydell, 2020/03/05
- [PULL 17/37] target/arm: Disable has_el2 and has_el3 for user-only, Peter Maydell, 2020/03/05
- [PULL 19/37] target/arm: Improve masking in arm_hcr_el2_eff, Peter Maydell, 2020/03/05
- [PULL 28/37] hw/arm/cubieboard: restrict allowed CPU type to ARM Cortex-A8, Peter Maydell, 2020/03/05
- Re: [PULL 00/37] target-arm queue, Peter Maydell, 2020/03/05