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[PULL 13/37] hw/arm/strongarm: move timer_new from init() into realize()
From: |
Peter Maydell |
Subject: |
[PULL 13/37] hw/arm/strongarm: move timer_new from init() into realize() to avoid memleaks |
Date: |
Thu, 5 Mar 2020 16:30:36 +0000 |
From: Pan Nengyuan <address@hidden>
There are some memleaks when we call 'device_list_properties'. This patch move
timer_new from init into realize to fix it.
Reported-by: Euler Robot <address@hidden>
Signed-off-by: Pan Nengyuan <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/strongarm.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index cd8a99aaf2e..3010d765bb7 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -399,9 +399,6 @@ static void strongarm_rtc_init(Object *obj)
s->last_rcnr = (uint32_t) mktimegm(&tm);
s->last_hz = qemu_clock_get_ms(rtc_clock);
- s->rtc_alarm = timer_new_ms(rtc_clock, strongarm_rtc_alarm_tick, s);
- s->rtc_hz = timer_new_ms(rtc_clock, strongarm_rtc_hz_tick, s);
-
sysbus_init_irq(dev, &s->rtc_irq);
sysbus_init_irq(dev, &s->rtc_hz_irq);
@@ -410,6 +407,13 @@ static void strongarm_rtc_init(Object *obj)
sysbus_init_mmio(dev, &s->iomem);
}
+static void strongarm_rtc_realize(DeviceState *dev, Error **errp)
+{
+ StrongARMRTCState *s = STRONGARM_RTC(dev);
+ s->rtc_alarm = timer_new_ms(rtc_clock, strongarm_rtc_alarm_tick, s);
+ s->rtc_hz = timer_new_ms(rtc_clock, strongarm_rtc_hz_tick, s);
+}
+
static int strongarm_rtc_pre_save(void *opaque)
{
StrongARMRTCState *s = opaque;
@@ -451,6 +455,7 @@ static void strongarm_rtc_sysbus_class_init(ObjectClass
*klass, void *data)
dc->desc = "StrongARM RTC Controller";
dc->vmsd = &vmstate_strongarm_rtc_regs;
+ dc->realize = strongarm_rtc_realize;
}
static const TypeInfo strongarm_rtc_sysbus_info = {
@@ -1240,15 +1245,16 @@ static void strongarm_uart_init(Object *obj)
"uart", 0x10000);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
-
- s->rx_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
strongarm_uart_rx_to, s);
- s->tx_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, strongarm_uart_tx, s);
}
static void strongarm_uart_realize(DeviceState *dev, Error **errp)
{
StrongARMUARTState *s = STRONGARM_UART(dev);
+ s->rx_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
+ strongarm_uart_rx_to,
+ s);
+ s->tx_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, strongarm_uart_tx, s);
qemu_chr_fe_set_handlers(&s->chr,
strongarm_uart_can_receive,
strongarm_uart_receive,
--
2.20.1
- [PULL 36/37] target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva, (continued)
- [PULL 36/37] target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva, Peter Maydell, 2020/03/05
- [PULL 31/37] target/arm: Replicate TBI/TBID bits for single range regimes, Peter Maydell, 2020/03/05
- [PULL 32/37] target/arm: Optimize cpu_mmu_index, Peter Maydell, 2020/03/05
- [PULL 33/37] target/arm: Introduce core_to_aa64_mmu_idx, Peter Maydell, 2020/03/05
- [PULL 20/37] target/arm: Honor the HCR_EL2.{TVM,TRVM} bits, Peter Maydell, 2020/03/05
- [PULL 23/37] target/arm: Honor the HCR_EL2.TPCP bit, Peter Maydell, 2020/03/05
- [PULL 37/37] target/arm: Clean address for DC ZVA, Peter Maydell, 2020/03/05
- [PULL 35/37] target/arm: Move helper_dc_zva to helper-a64.c, Peter Maydell, 2020/03/05
- [PULL 01/37] hw/arm: versal: Add support for the LPD ADMAs, Peter Maydell, 2020/03/05
- [PULL 07/37] hw/arm/mainstone: Simplify since the machines are little-endian only, Peter Maydell, 2020/03/05
- [PULL 13/37] hw/arm/strongarm: move timer_new from init() into realize() to avoid memleaks,
Peter Maydell <=
- [PULL 12/37] hw/arm/spitz: move timer_new from init() into realize() to avoid memleaks, Peter Maydell, 2020/03/05
- [PULL 14/37] hw/timer/cadence_ttc: move timer_new from init() into realize() to avoid memleaks, Peter Maydell, 2020/03/05
- [PULL 17/37] target/arm: Disable has_el2 and has_el3 for user-only, Peter Maydell, 2020/03/05
- [PULL 19/37] target/arm: Improve masking in arm_hcr_el2_eff, Peter Maydell, 2020/03/05
- [PULL 28/37] hw/arm/cubieboard: restrict allowed CPU type to ARM Cortex-A8, Peter Maydell, 2020/03/05
- Re: [PULL 00/37] target-arm queue, Peter Maydell, 2020/03/05