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Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers
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From: |
Philippe Mathieu-Daudé |
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Subject: |
Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers |
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Date: |
Fri, 12 Feb 2021 19:56:19 +0100 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 |
On 2/9/21 8:30 PM, Mark Cave-Ayland wrote:
> The MacOS toolbox ROM performs 4 byte reads/writes when transferring data to
> and from the target. Since the SCSI bus is 16-bits wide, use the memory API
> to split a 4 byte access into 2 x 2 byte accesses.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
> hw/scsi/esp.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Out of curiosity, what is the bus used?
- Re: [PATCH v2 24/42] esp: use in-built TC to determine PDMA transfer length, (continued)
- [PATCH v2 22/42] esp: move PDMA length adjustments into esp_pdma_read()/esp_pdma_write(), Mark Cave-Ayland, 2021/02/09
- [PATCH v2 23/42] esp: use ti_wptr/ti_rptr to manage the current FIFO position for PDMA, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 25/42] esp: remove CMD pdma_origin, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 26/42] esp: rename get_cmd_cb() to esp_select(), Mark Cave-Ayland, 2021/02/09
- [PATCH v2 27/42] esp: fix PDMA target selection, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 28/42] esp: use FIFO for PDMA transfers between initiator and device, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 29/42] esp: remove pdma_origin from ESPState, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Mark Cave-Ayland, 2021/02/09
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers,
Philippe Mathieu-Daudé <=
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Mark Cave-Ayland, 2021/02/15
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Philippe Mathieu-Daudé, 2021/02/16
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Mark Cave-Ayland, 2021/02/16
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Mark Cave-Ayland, 2021/02/23
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Philippe Mathieu-Daudé, 2021/02/23
[PATCH v2 31/42] esp: implement FIFO flush command, Mark Cave-Ayland, 2021/02/09
[PATCH v2 32/42] esp: latch individual bits in ESP_RINTR register, Mark Cave-Ayland, 2021/02/09
[PATCH v2 34/42] esp: remove old deferred command completion mechanism, Mark Cave-Ayland, 2021/02/09
[PATCH v2 33/42] esp: defer command completion interrupt on incoming data transfers, Mark Cave-Ayland, 2021/02/09