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Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers

From: Mark Cave-Ayland
Subject: Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers
Date: Mon, 15 Feb 2021 22:35:11 +0000
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0

On 12/02/2021 18:56, Philippe Mathieu-Daudé wrote:

On 2/9/21 8:30 PM, Mark Cave-Ayland wrote:
The MacOS toolbox ROM performs 4 byte reads/writes when transferring data to
and from the target. Since the SCSI bus is 16-bits wide, use the memory API
to split a 4 byte access into 2 x 2 byte accesses.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  hw/scsi/esp.c | 6 ++++--
  1 file changed, 4 insertions(+), 2 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Out of curiosity, what is the bus used?

AFAICT it's a custom logic chip that sits on the CPU address/data buses that does the decoding between the CPU and ESP chip. Other than a simple block diagram of the Quadra there isn't much official documentation out there :/

Are you planning to review any more of this series? I'm keen to put out a (hopefully final) v3 soon, but I'll hold off for little while if you want more time to look over the remaining patches.



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