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[PULL 15/43] target/mips: Let do_translate_address() take MMUAccessType
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 15/43] target/mips: Let do_translate_address() take MMUAccessType argument |
Date: |
Sun, 21 Feb 2021 15:34:04 +0100 |
The single caller, HELPER_LD_ATOMIC(), passes MMUAccessType to
do_translate_address(). Let the prototype use it as argument,
as it is stricter than an integer.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20210128144125.3696119-9-f4bug@amsat.org>
---
target/mips/op_helper.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 9fce0194b3e..b80e8f75401 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -288,13 +288,14 @@ target_ulong helper_rotx(target_ulong rs, uint32_t shift,
uint32_t shiftx,
#ifndef CONFIG_USER_ONLY
static inline hwaddr do_translate_address(CPUMIPSState *env,
- target_ulong address,
- int rw, uintptr_t
retaddr)
+ target_ulong address,
+ MMUAccessType access_type,
+ uintptr_t retaddr)
{
hwaddr paddr;
CPUState *cs = env_cpu(env);
- paddr = cpu_mips_translate_address(env, address, rw);
+ paddr = cpu_mips_translate_address(env, address, access_type);
if (paddr == -1LL) {
cpu_loop_exit_restore(cs, retaddr);
--
2.26.2
- [PULL 06/43] hw/intc/loongson_liointc: Fix per core ISR handling, (continued)
- [PULL 06/43] hw/intc/loongson_liointc: Fix per core ISR handling, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 07/43] tests/acceptance: Test PMON with Loongson-3A1000 CPU, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 08/43] target/mips: fetch code with translator_ld, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 04/43] hw/mips/boston: Use bl_gen_kernel_jump to generate bootloaders, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 09/43] target/mips: Remove access_type argument from map_address() handler, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 10/43] target/mips: Remove access_type argument from get_seg_physical_address, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 11/43] target/mips: Remove access_type arg from get_segctl_physical_address(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 12/43] target/mips: Remove access_type argument from get_physical_address(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 13/43] target/mips: Remove unused MMU definitions, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 14/43] target/mips: Replace magic value by MMU_DATA_LOAD definition, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 15/43] target/mips: Let do_translate_address() take MMUAccessType argument,
Philippe Mathieu-Daudé <=
- [PULL 16/43] target/mips: Let cpu_mips_translate_address() take MMUAccessType arg, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 17/43] target/mips: Let raise_mmu_exception() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 18/43] target/mips: Let get_physical_address() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 19/43] target/mips: Let get_seg*_physical_address() take MMUAccessType arg, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 20/43] target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 21/43] target/mips: Remove unused 'rw' argument from page_table_walk_refill(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 22/43] target/mips: Include missing "tcg/tcg.h" header, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 23/43] target/mips: Make cpu_HI/LO registers public, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 25/43] target/mips: Rename 128-bit upper halve GPR registers, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 29/43] vt82c686: Reorganise code, Philippe Mathieu-Daudé, 2021/02/21