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[PULL 11/46] hw/mips/gt64xxx_pci: Move it to hw/pci-host/
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 11/46] hw/mips/gt64xxx_pci: Move it to hw/pci-host/ |
Date: |
Fri, 13 Jan 2023 16:44:57 +0100 |
The GT-64120 is a north-bridge, and it is not MIPS specific.
Move it with the other north-bridge devices.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221209151533.69516-8-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
MAINTAINERS | 2 +-
hw/mips/Kconfig | 6 ------
hw/mips/meson.build | 1 -
hw/mips/trace-events | 7 -------
hw/pci-host/Kconfig | 6 ++++++
hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} | 0
hw/pci-host/meson.build | 1 +
hw/pci-host/trace-events | 7 +++++++
8 files changed, 15 insertions(+), 15 deletions(-)
rename hw/{mips/gt64xxx_pci.c => pci-host/gt64120.c} (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5606e5dbd2..a670fbc926 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1241,7 +1241,7 @@ S: Odd Fixes
F: hw/isa/piix4.c
F: hw/acpi/piix4.c
F: hw/mips/malta.c
-F: hw/mips/gt64xxx_pci.c
+F: hw/pci-host/gt64120.c
F: include/hw/southbridge/piix.h
F: tests/avocado/linux_ssh_mips_malta.py
F: tests/avocado/machine_mips_malta.py
diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
index 8f7bce38fb..7a55143f8a 100644
--- a/hw/mips/Kconfig
+++ b/hw/mips/Kconfig
@@ -60,9 +60,3 @@ config MIPS_BOSTON
config FW_CFG_MIPS
bool
-
-config GT64120
- bool
- select PCI
- select EMPTY_SLOT
- select I8259
diff --git a/hw/mips/meson.build b/hw/mips/meson.build
index 152103f15f..900613fc08 100644
--- a/hw/mips/meson.build
+++ b/hw/mips/meson.build
@@ -3,7 +3,6 @@ mips_ss.add(files('bootloader.c', 'mips_int.c'))
mips_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c'))
mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c',
'loongson3_virt.c'))
mips_ss.add(when: 'CONFIG_MALTA', if_true: files('malta.c'))
-softmmu_ss.add(when: 'CONFIG_GT64120', if_true: files('gt64xxx_pci.c'))
mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c'))
if 'CONFIG_TCG' in config_all
diff --git a/hw/mips/trace-events b/hw/mips/trace-events
index b5b882c6c2..4a4e5fe1a1 100644
--- a/hw/mips/trace-events
+++ b/hw/mips/trace-events
@@ -1,10 +1,3 @@
-# gt64xxx_pci.c
-gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64"
value:0x%08" PRIx64
-gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64"
value:0x%08" PRIx64
-gt64120_read_intreg(const char *regname, unsigned size, uint64_t value)
"gt64120 read %s size:%u value:0x%08" PRIx64
-gt64120_write_intreg(const char *regname, unsigned size, uint64_t value)
"gt64120 write %s size:%u value:0x%08" PRIx64
-gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t
to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08"
PRIx64 "@0x%08" PRIx64
-
# malta.c
malta_fpga_leds(const char *text) "LEDs %s"
malta_fpga_display(const char *text) "ASCII '%s'"
diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig
index 38fd2ee8f3..a07070eddf 100644
--- a/hw/pci-host/Kconfig
+++ b/hw/pci-host/Kconfig
@@ -81,3 +81,9 @@ config MV64361
config DINO
bool
select PCI
+
+config GT64120
+ bool
+ select PCI
+ select EMPTY_SLOT
+ select I8259
diff --git a/hw/mips/gt64xxx_pci.c b/hw/pci-host/gt64120.c
similarity index 100%
rename from hw/mips/gt64xxx_pci.c
rename to hw/pci-host/gt64120.c
diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build
index e832babc9d..9a813d552e 100644
--- a/hw/pci-host/meson.build
+++ b/hw/pci-host/meson.build
@@ -1,6 +1,7 @@
pci_ss = ss.source_set()
pci_ss.add(when: 'CONFIG_PAM', if_true: files('pam.c'))
pci_ss.add(when: 'CONFIG_PCI_BONITO', if_true: files('bonito.c'))
+pci_ss.add(when: 'CONFIG_GT64120', if_true: files('gt64120.c'))
pci_ss.add(when: 'CONFIG_PCI_EXPRESS_DESIGNWARE', if_true:
files('designware.c'))
pci_ss.add(when: 'CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', if_true: files('gpex.c'))
pci_ss.add(when: ['CONFIG_PCI_EXPRESS_GENERIC_BRIDGE', 'CONFIG_ACPI'],
if_true: files('gpex-acpi.c'))
diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events
index 437e66ff50..9d216bb89f 100644
--- a/hw/pci-host/trace-events
+++ b/hw/pci-host/trace-events
@@ -6,6 +6,13 @@ bonito_spciconf_small_access(uint64_t addr, unsigned size)
"PCI config address i
# grackle.c
grackle_set_irq(int irq_num, int level) "set_irq num %d level %d"
+# gt64120.c
+gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64"
value:0x%08" PRIx64
+gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64"
value:0x%08" PRIx64
+gt64120_read_intreg(const char *regname, unsigned size, uint64_t value)
"gt64120 read %s size:%u value:0x%08" PRIx64
+gt64120_write_intreg(const char *regname, unsigned size, uint64_t value)
"gt64120 write %s size:%u value:0x%08" PRIx64
+gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t
to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08"
PRIx64 "@0x%08" PRIx64
+
# mv64361.c
mv64361_region_map(const char *name, uint64_t poffs, uint64_t size, uint64_t
moffs) "Mapping %s 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64
mv64361_region_enable(const char *op, int num) "Should %s region %d"
--
2.38.1
- [PULL 01/46] hw/mips/malta: Split FPGA LEDs/ASCII display updates, (continued)
- [PULL 01/46] hw/mips/malta: Split FPGA LEDs/ASCII display updates, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 02/46] hw/mips/malta: Trace FPGA LEDs/ASCII display updates, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 03/46] hw/mips/gt64xxx_pci: Accumulate address space changes, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 04/46] hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 05/46] hw/mips/Kconfig: Introduce CONFIG_GT64120 to select gt64xxx_pci.c, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 06/46] hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 07/46] hw/mips/gt64xxx_pci: Manage endian bits with the RegisterFields API, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 13/46] hw/mips/bootloader: Handle buffers as opaque arrays, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 09/46] hw/mips/malta: Explicit GT64120 endianness upon device creation, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 10/46] hw/mips/meson: Make gt64xxx_pci.c endian-agnostic, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 11/46] hw/mips/gt64xxx_pci: Move it to hw/pci-host/,
Philippe Mathieu-Daudé <=
- [PULL 14/46] hw/mips/bootloader: Implement nanoMIPS NOP opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 08/46] hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 12/46] tests/avocado: Add tests booting YAMON ROM on MIPS Malta machines, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 15/46] hw/mips/bootloader: Implement nanoMIPS SW opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 16/46] hw/mips/bootloader: Implement nanoMIPS LI (LUI+ORI) opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 17/46] hw/mips/bootloader: Implement nanoMIPS JALRc opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 18/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (1/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 19/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (2/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 20/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (3/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 21/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (4/5), Philippe Mathieu-Daudé, 2023/01/13