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[PULL 21/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CP
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 21/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (4/5) |
Date: |
Fri, 13 Jan 2023 16:45:07 +0100 |
Part 4/5: Convert GT64120 ISD base address setup
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221211204533.85359-10-philmd@linaro.org>
---
hw/mips/malta.c | 40 +++++++---------------------------------
1 file changed, 7 insertions(+), 33 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index f0ed32167f..e618513e35 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -689,46 +689,20 @@ static void write_bootloader_nanomips(uint8_t *base,
uint64_t run_addr,
stw_p(p++, 0x80e7); stw_p(p++, NM_LO(loaderparams.ram_low_size));
/* ori a3,a3,%lo(loaderparams.ram_low_size) */
- /*
- * Load BAR registers as done by YAMON:
- */
- stw_p(p++, 0xe040); stw_p(p++, 0x0681);
- /* lui t1, %hi(0xb4000000) */
-
#if TARGET_BIG_ENDIAN
#define cpu_to_gt32 cpu_to_le32
-
- stw_p(p++, 0xe020); stw_p(p++, 0x0be1);
- /* lui t0, %hi(0xdf000000) */
-
- /* 0x68 corresponds to GT_ISD (from hw/mips/gt64xxx_pci.c) */
- stw_p(p++, 0x8422); stw_p(p++, 0x9068);
- /* sw t0, 0x68(t1) */
-
- stw_p(p++, 0xe040); stw_p(p++, 0x077d);
- /* lui t1, %hi(0xbbe00000) */
-
- stw_p(p++, 0xe020); stw_p(p++, 0x0801);
- /* lui t0, %hi(0xc0000000) */
#else
#define cpu_to_gt32 cpu_to_be32
-
- stw_p(p++, 0x0020); stw_p(p++, 0x00df);
- /* addiu[32] t0, $0, 0xdf */
-
- /* 0x68 corresponds to GT_ISD */
- stw_p(p++, 0x8422); stw_p(p++, 0x9068);
- /* sw t0, 0x68(t1) */
-
- /* Use kseg2 remapped address 0x1be00000 */
- stw_p(p++, 0xe040); stw_p(p++, 0x077d);
- /* lui t1, %hi(0xbbe00000) */
-
- stw_p(p++, 0x0020); stw_p(p++, 0x00c0);
- /* addiu[32] t0, $0, 0xc0 */
#endif
v = p;
+ /* setup MEM-to-PCI0 mapping as done by YAMON */
+
+ /* move GT64120 registers from 0x14000000 to 0x1be00000 */
+ bl_gen_write_u32(&v, /* GT_ISD */
+ cpu_mips_phys_to_kseg1(NULL, 0x14000000 + 0x68),
+ cpu_to_gt32(0x1be00000 << 3));
+
/* setup PCI0 io window to 0x18000000-0x181fffff */
bl_gen_write_u32(&v, /* GT_PCI0IOLD */
cpu_mips_phys_to_kseg1(NULL, 0x1be00000 + 0x48),
--
2.38.1
- [PULL 11/46] hw/mips/gt64xxx_pci: Move it to hw/pci-host/, (continued)
- [PULL 11/46] hw/mips/gt64xxx_pci: Move it to hw/pci-host/, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 14/46] hw/mips/bootloader: Implement nanoMIPS NOP opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 08/46] hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 12/46] tests/avocado: Add tests booting YAMON ROM on MIPS Malta machines, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 15/46] hw/mips/bootloader: Implement nanoMIPS SW opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 16/46] hw/mips/bootloader: Implement nanoMIPS LI (LUI+ORI) opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 17/46] hw/mips/bootloader: Implement nanoMIPS JALRc opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 18/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (1/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 19/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (2/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 20/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (3/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 21/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (4/5),
Philippe Mathieu-Daudé <=
- [PULL 22/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (5/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 23/46] hw/mips/malta: Merge common BL code as bl_setup_gt64120_jump_kernel(), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 24/46] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 25/46] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 26/46] hw/isa/piix4: Correct IRQRC[A:D] reset values, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 27/46] mips: Remove support for trap and emulate KVM, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 28/46] mips: Always include nanomips disassembler, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 29/46] hw/pci/pci_host: Trace config accesses on unexisting functions, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 30/46] hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs(), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 31/46] hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific, Philippe Mathieu-Daudé, 2023/01/13