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[PULL 17/46] hw/mips/bootloader: Implement nanoMIPS JALRc opcode generat
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 17/46] hw/mips/bootloader: Implement nanoMIPS JALRc opcode generator |
Date: |
Fri, 13 Jan 2023 16:45:03 +0100 |
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221211204533.85359-6-philmd@linaro.org>
---
hw/mips/bootloader.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c
index 9fc926d83f..1dd6ef2096 100644
--- a/hw/mips/bootloader.c
+++ b/hw/mips/bootloader.c
@@ -129,7 +129,17 @@ static void bl_gen_dsll(void **p, bl_reg rd, bl_reg rt,
uint8_t sa)
static void bl_gen_jalr(void **p, bl_reg rs)
{
- bl_gen_r_type(p, 0, rs, 0, BL_REG_RA, 0, 0x09);
+ if (bootcpu_supports_isa(ISA_NANOMIPS32)) {
+ uint32_t insn = 0;
+
+ insn = deposit32(insn, 26, 6, 0b010010); /* JALRC */
+ insn = deposit32(insn, 21, 5, BL_REG_RA);
+ insn = deposit32(insn, 16, 5, rs);
+
+ st_nm32_p(p, insn);
+ } else {
+ bl_gen_r_type(p, 0, rs, 0, BL_REG_RA, 0, 0x09);
+ }
}
static void bl_gen_lui_nm(void **ptr, bl_reg rt, uint32_t imm20)
--
2.38.1
- [PULL 07/46] hw/mips/gt64xxx_pci: Manage endian bits with the RegisterFields API, (continued)
- [PULL 07/46] hw/mips/gt64xxx_pci: Manage endian bits with the RegisterFields API, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 13/46] hw/mips/bootloader: Handle buffers as opaque arrays, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 09/46] hw/mips/malta: Explicit GT64120 endianness upon device creation, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 10/46] hw/mips/meson: Make gt64xxx_pci.c endian-agnostic, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 11/46] hw/mips/gt64xxx_pci: Move it to hw/pci-host/, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 14/46] hw/mips/bootloader: Implement nanoMIPS NOP opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 08/46] hw/mips/gt64xxx_pci: Add a 'cpu-little-endian' qdev property, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 12/46] tests/avocado: Add tests booting YAMON ROM on MIPS Malta machines, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 15/46] hw/mips/bootloader: Implement nanoMIPS SW opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 16/46] hw/mips/bootloader: Implement nanoMIPS LI (LUI+ORI) opcode generator, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 17/46] hw/mips/bootloader: Implement nanoMIPS JALRc opcode generator,
Philippe Mathieu-Daudé <=
- [PULL 18/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (1/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 19/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (2/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 20/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (3/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 21/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (4/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 22/46] hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (5/5), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 23/46] hw/mips/malta: Merge common BL code as bl_setup_gt64120_jump_kernel(), Philippe Mathieu-Daudé, 2023/01/13
- [PULL 24/46] hw/mips/malta: Introduce PIIX4_PCI_DEVFN definition, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 25/46] hw/mips/malta: Set PIIX4 IRQ routes in embedded bootloader, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 26/46] hw/isa/piix4: Correct IRQRC[A:D] reset values, Philippe Mathieu-Daudé, 2023/01/13
- [PULL 27/46] mips: Remove support for trap and emulate KVM, Philippe Mathieu-Daudé, 2023/01/13