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[PULL 28/43] vt82c686: Move superio memory region to SuperIOConfig struc
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 28/43] vt82c686: Move superio memory region to SuperIOConfig struct |
Date: |
Sun, 21 Feb 2021 15:34:17 +0100 |
From: BALATON Zoltan <balaton@eik.bme.hu>
The superio memory region holds the io space index/data registers used
to access the superio config registers that are implemented in struct
SuperIOConfig. To keep these related things together move the memory
region to SuperIOConfig and rename it accordingly.
Also remove the unused "data" member of SuperIOConfig which is not
needed as we store actual data values in the regs array.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id:
<dc3c4e7632716ca73c10506bd02ee93b39c28705.1610223397.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/isa/vt82c686.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index a6f5a0843d0..30fe02f4c60 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -29,12 +29,11 @@
typedef struct SuperIOConfig {
uint8_t regs[0x100];
uint8_t index;
- uint8_t data;
+ MemoryRegion io;
} SuperIOConfig;
struct VT82C686BISAState {
PCIDevice dev;
- MemoryRegion superio;
SuperIOConfig superio_cfg;
};
@@ -128,8 +127,9 @@ static void vt82c686b_write_config(PCIDevice *d, uint32_t
addr,
trace_via_isa_write(addr, val, len);
pci_default_write_config(d, addr, val, len);
- if (addr == 0x85) { /* enable or disable super IO configure */
- memory_region_set_enabled(&s->superio, val & 0x2);
+ if (addr == 0x85) {
+ /* BIT(1): enable or disable superio config io ports */
+ memory_region_set_enabled(&s->superio_cfg.io, val & BIT(1));
}
}
@@ -311,15 +311,15 @@ static void vt82c686b_realize(PCIDevice *d, Error **errp)
}
}
- memory_region_init_io(&s->superio, OBJECT(d), &superio_cfg_ops,
- &s->superio_cfg, "superio", 2);
- memory_region_set_enabled(&s->superio, false);
+ memory_region_init_io(&s->superio_cfg.io, OBJECT(d), &superio_cfg_ops,
+ &s->superio_cfg, "superio_cfg", 2);
+ memory_region_set_enabled(&s->superio_cfg.io, false);
/*
* The floppy also uses 0x3f0 and 0x3f1.
* But we do not emulate a floppy, so just set it here.
*/
memory_region_add_subregion(isa_bus->address_space_io, 0x3f0,
- &s->superio);
+ &s->superio_cfg.io);
}
static void via_class_init(ObjectClass *klass, void *data)
--
2.26.2
- [PULL 16/43] target/mips: Let cpu_mips_translate_address() take MMUAccessType arg, (continued)
- [PULL 16/43] target/mips: Let cpu_mips_translate_address() take MMUAccessType arg, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 17/43] target/mips: Let raise_mmu_exception() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 18/43] target/mips: Let get_physical_address() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 19/43] target/mips: Let get_seg*_physical_address() take MMUAccessType arg, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 20/43] target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 21/43] target/mips: Remove unused 'rw' argument from page_table_walk_refill(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 22/43] target/mips: Include missing "tcg/tcg.h" header, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 23/43] target/mips: Make cpu_HI/LO registers public, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 25/43] target/mips: Rename 128-bit upper halve GPR registers, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 29/43] vt82c686: Reorganise code, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 28/43] vt82c686: Move superio memory region to SuperIOConfig struct,
Philippe Mathieu-Daudé <=
- [PULL 24/43] target/mips: Promote 128-bit multimedia registers as global ones, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 31/43] vt82c686: Make vt82c686-pm an I/O tracing region, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 26/43] target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 32/43] vt82c686: Correct vt82c686-pm I/O size, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 27/43] target/mips: Use GPR move functions in gen_HILO1_tx79(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 30/43] vt82c686: Fix SMBus IO base and configuration registers, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 33/43] vt82c686: Correctly reset all registers to default values on reset, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 34/43] vt82c686: Fix up power management io base and config, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 35/43] vt82c686: Set user_creatable=false for VT82C686B_PM, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 36/43] vt82c686: Make vt82c686b-pm an abstract base class and add vt8231-pm based on it, Philippe Mathieu-Daudé, 2021/02/21